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Message-ID: <98CA462042A5283C+38a7a131-b02a-e4a2-180d-1e64cb788af3@linux.starfivetech.com>
Date: Sat, 8 Oct 2022 11:18:19 +0800
From: Hal Feng <hal.feng@...ux.starfivetech.com>
To: Emil Renner Berthing <emil.renner.berthing@...onical.com>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Linus Walleij <linus.walleij@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 00/30] Basic StarFive JH7110 RISC-V SoC support
On Wed, 5 Oct 2022 15:05:45 +0200, Emil Renner Berthing wrote:
> On Thu, 29 Sept 2022 at 16:34, Hal Feng <hal.feng@...ux.starfivetech.com> wrote:
> > This series adds basic support for the StarFive JH7110 RISC-V SoC to
> > boot up and get a serial console. This series includes basic clock,
> > reset, pinctrl and uart drivers, which are necessary for booting.
> > It's should be noted that the reset and clock driver codes of JH7110
> > are partly common with those of JH7100, so the common codes are
> > factored out and can be reused by drivers of JH7110 and other more
> > SoCs from StarFive.
> >
> > The JH7110 is the upgraded version of JH7100 and also the first official
> > released version of JH71XX series SoCs from StarFive Technology Ltd.
> > The VisionFive 2 boards equipped with JH7110 SoCs are launched
> > recently [1]. More information and support can visit RVspace wiki [2].
> >
> > This series is also available at
> > https://github.com/hal-feng/linux/commits/visionfive2-minimal
> >
> > [1] https://www.cnx-software.com/2022/08/23/starfive-visionfive-2-quad-core-risc-v-sbc-linux/
> > [2] https://wiki.rvspace.org/
>
> Hi Hal,
>
> Firstly thanks for working on this! And sorry about the late reply. On
> the next version could you please cc
> emil.renner.berthing@...onical.com since it seems to handle the
> mailing list a bit better.
OK, I will cc to your new email instead on v2.
Best Regards,
Hal
> I see you've changed the clock/reset and pinctrl quite a bit, so I'll
> comment on that separatel
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