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Message-ID: <CAD=FV=Va6xUtVEd0jgQF3+5OM6tQ=nW6xZeRatXULY3SUqAKBQ@mail.gmail.com>
Date: Thu, 13 Oct 2022 08:11:51 -0700
From: Doug Anderson <dianders@...omium.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] arm64: dts: qcom: sc7180: align TLMM pin
configuration with DT schema
Hi,
On Thu, Oct 13, 2022 at 7:59 AM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> >> diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
> >> index 1bd6c7dcd9e9..c66568a882b3 100644
> >> --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
> >> @@ -180,30 +180,19 @@ &wifi {
> >> /* PINCTRL - modifications to sc7180-trogdor.dtsi */
> >>
> >> &en_pp3300_dx_edp {
> >> - pinmux {
> >> - pins = "gpio67";
> >> - };
> >> -
> >> - pinconf {
> >> - pins = "gpio67";
> >> - };
> >> + pins = "gpio67";
> >> };
> >>
> >> &sec_mi2s_active{
> >> - pinmux {
> >> - pins = "gpio49", "gpio50", "gpio51", "gpio52";
> >> - function = "mi2s_1";
> >> - };
> >> + pins = "gpio49", "gpio50", "gpio51", "gpio52";
> >
> > Looks like the point of the homestar override is to add an extra pin
> > (gpio52) but it forgot to update the list in the "pinconf" as well so
> > gpio52 wasn't getting a drive strength and bias set. Your patch
> > has the side effect of fixing this. That looks right to me (match
> > GPIO51) given that the name of GPIO51 is AMP_DIN and GPIO52 AMP_DIN2.
>
> I miss here something... There was no pinconf in
> sc7180.dtsi/sc7180-trogdor-homestar.dtsi/homestar.dts
>
> Where do you see the drive strength and bias set for the gpio49-51?
Let's see. I think you're missing "sc7180-trogdor.dtsi". So looking at
mainline today without applying your patches.
In sc7180.dtsi:
sec_mi2s_active: sec-mi2s-active {
pinmux {
pins = "gpio49", "gpio50", "gpio51";
function = "mi2s_1";
};
};
Then in sc7180-trogdor.dtsi:
&sec_mi2s_active {
pinconf {
pins = "gpio49", "gpio50", "gpio51";
drive-strength = <2>;
bias-pull-down;
};
};
Then in sc7180-trogdor-homestar.dtsi:
&sec_mi2s_active{
pinmux {
pins = "gpio49", "gpio50", "gpio51", "gpio52";
function = "mi2s_1";
};
};
The end result of those snippets ought to be something where, on
homestar, the pinmux gets set to "mi2s_1" for gpio49 - 52 but the
pinconf only gets set for gpio49 - 51 (missing 52).
Your patch fixes this oversight because it combines the muxing and
configuration into one node.
-Doug
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