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Date: Fri, 14 Oct 2022 17:44:04 +0200 From: Patrick DELAUNAY <patrick.delaunay@...s.st.com> To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>, Maxime Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...s.st.com> CC: <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>, <linux-stm32@...md-mailman.stormreply.com> Subject: Re: [PATCH 1/2] nvmem: stm32: add warning when upper OTPs are updated Hi, On 10/14/22 17:04, Patrick Delaunay wrote: > As the upper OTPs are ECC protected, they support only one 32 bits word > programming. > For a second modification of this word, these ECC become invalid and > this OTP will be no more accessible, the shadowed value is invalid. > > This patch adds a warning to indicate an upper OTP update, because this > operation is dangerous as OTP is not locked by the driver after the first > update to avoid a second update. > > Signed-off-by: Patrick Delaunay <patrick.delaunay@...s.st.com> > --- > > drivers/nvmem/stm32-romem.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c > index 354be526897f..e3c3c333b5d1 100644 > --- a/drivers/nvmem/stm32-romem.c > +++ b/drivers/nvmem/stm32-romem.c > @@ -133,6 +133,9 @@ static int stm32_bsec_write(void *context, unsigned int offset, void *buf, > } > } > > + if (offset + bytes >= priv->lower * 4) Here I miss a dependency for "priv->lower" with a other preliminary patch for STM32MP13x support. > + dev_warn(dev, "Update of upper OTPs with ECC protection (word programming, only once)\n"); > + > return 0; > } > Sorry, I will sent a V2 soon Patrick
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