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Message-ID: <trinity-8fe25643-9cf4-4f09-bebb-208570a540d4-1666107900051@3c-app-gmx-bap38>
Date: Tue, 18 Oct 2022 17:45:00 +0200
From: Frank Wunderlich <frank-w@...lic-files.de>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Frank Wunderlich <linux@...web.de>,
linux-mediatek@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Aw: Re: [RFC v1 02/12] dt-bindings: PCI: mediatek-gen3: add support
for mt7986
Hi,
> Gesendet: Dienstag, 18. Oktober 2022 um 17:35 Uhr
> Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@...aro.org>
> On 17/10/2022 06:41, Frank Wunderlich wrote:
> > From: Frank Wunderlich <frank-w@...lic-files.de>
> Maybe the clock is not required on mt7986?
yes, mt7986 does not have all clocks currently defined in binding for gen3-pcie (currently mt8xxx)
the mapping is as followed:
CLK_INFRA_IPCIER_CK: peri_26m
CLK_INFRA_IPCIEB_CK: top_133m
CLK_INFRA_IPCIE_CK: pcie working clock from SoC, in MT7986 it is equal to tl_26m + tl_96m + tl_32k in MT8192
CLK_INFRA_PCIE_SEL: clock mux to select source clock to CLK_INFRA_IPCIE_CK
CLK_INFRA_IPCIE_PIPE_CK : pcie working clock from PHY, pl_250m
as far as i see the driver only enables the clocks in bulk (no access to the clock-names), but binding needs the names
got it solved with help from mtk (see my comment on part 7) with filling missing clocks with a fixed-clock-node.
If this is the right way this binding-change is enough ;)
> Anyway, for the bindings:
>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
thx
regards Frank
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