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Message-ID: <01dfdbec-1a1f-6118-23fb-8b8f7b827c82@amazon.com>
Date:   Wed, 19 Oct 2022 12:52:08 +0300
From:   "Farber, Eliav" <farbere@...zon.com>
To:     Michael Walle <michael@...le.cc>
CC:     <tudor.ambarus@...rochip.com>, <pratyush@...nel.org>,
        <miquel.raynal@...tlin.com>, <richard@....at>, <vigneshr@...com>,
        <linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <talel@...zon.com>, <jonnyc@...zon.com>, <hhhawa@...zon.com>,
        <hanochu@...zon.com>, <itamark@...zon.com>, <shellykz@...zon.com>,
        <amitlavi@...zon.com>, <dkl@...zon.com>,
        "Farber, Eliav" <farbere@...zon.com>
Subject: Re: [PATCH v2 1/1] mtd: spi-nor: micron-st: Enable locking for
 n25q256ax1/mt25qu256a

On 10/19/2022 12:38 PM, Michael Walle wrote:
> Am 2022-10-19 11:25, schrieb Farber, Eliav:
>> On 10/19/2022 11:21 AM, Michael Walle wrote:
>>> Hi,
>>>
>>> Am 2022-10-19 09:16, schrieb Eliav Farber:
>>>> n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id -
>>>> 0x20bb19)
>>>> use the 4 bit Block Protection scheme and support Top/Bottom
>>>> protection
>>>> via the BP and TB bits of the Status Register.
>>>> BP3 is located in bit 6 of the Status Register.
>>>> Tested on both n25q256ax1 and mt25qu256a.
>>>>
>>>> [1]
>>>> https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf 
>>>>
>>>> [2]
>>>> https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf 
>>>>
>>>
>>> If you respin, you can use a "Link:" tag for the URL above.
>>
>> Ack.
>>
>>>> Signed-off-by: Eliav Farber <farbere@...zon.com>
>>>> ---
>>>> xxd -p
>>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 
>>>>
>>>> 53464450060101ff00060110300000ff84000102800000ffffffffffffff
>>>> ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b
>>>> 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e
>>>> 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
>>>> ffffffffffffffffffe7ffff21dcffff
>>>>
>>>> md5sum
>>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 
>>>>
>>>> 5ea738216f68c9f98987bb3725699a32
>>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 
>>>>
>>>> cat
>>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 
>>>>
>>>> 20bb19104400
>>>>
>>>> cat
>>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname 
>>>>
>>>> mt25qu256a
>>>>
>>>> cat
>>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer 
>>>>
>>>> st
>>>
>>> That's the mt25qu256a SFDP. What about the n25q256ax1?
>>
>> On the same card, with same NOR flash memory I'm running two different
>> kernel versions.
>> First version is quite old - 4.19.239 which does not support mt25qu256a
>> and therefore device is detected as n25q256ax1.
>> Second version is 6.1.0-rc1 and it detects the same device as
>> mt25qu256a.
>> So I was able to dump SFDP when running version 6.1.0-rc1, but not when
>> running 4.19.239 which does not support the sysfs to dump the SFPD
>> information.
>> I checked that locking works with my changes when running on both
>> kernel
>> versions.
>
> So you've only tested on an mt25qu256a, correct? Then you should only
> add the locking to this flash device. (and maybe backport the mt25qu256a
> to your older kernel). 

I dumped SFDP tables only for mt25qu256a, but as I mentioned I tested
locking functionality for both (on 4.19.239 which detects the device as
n25q256ax1 and on 6.1.0-rc1  which detects the device as mt25qu256a).
This is the flow I used for testing the change on both versions:

# flash_lock -i /dev/mtd0
fDevice: /dev/mtd0
Start: 0
lLen: 0x1000000
Lock status: unlocked
Return code: 0
# flash_lock -l /dev/mtd0
# flash_lock -i /dev/mtd0
fDevice: /dev/mtd0
Start: 0
Len: 0x1000000
Lock status: locked
Return code: 1
# flash_lock -u /dev/mtd0
# flash_lock -i /dev/mtd0
Device: /dev/mtd0
Start: 0
Len: 0x1000000
Lock status: unlocked

Do you still want this patch to change only mt25qu256a?

--
Regards, Eliav

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