linux-kernel - Re: [PATCH v3 1/1] mtd: spi-nor: micron-st: Enable locking for mt25qu256a

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Message-ID: <d91e3d91f085390d5dbe0c4415c9e37f@walle.cc>
Date:   Thu, 20 Oct 2022 12:46:33 +0200
From:   Michael Walle <michael@...le.cc>
To:     Eliav Farber <farbere@...zon.com>
Cc:     tudor.ambarus@...rochip.com, pratyush@...nel.org,
        miquel.raynal@...tlin.com, richard@....at, vigneshr@...com,
        linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
        talel@...zon.com, jonnyc@...zon.com, hhhawa@...zon.com,
        hanochu@...zon.com, itamark@...zon.com, shellykz@...zon.com,
        amitlavi@...zon.com, dkl@...zon.com
Subject: Re: [PATCH v3 1/1] mtd: spi-nor: micron-st: Enable locking for
 mt25qu256a

Am 2022-10-20 11:20, schrieb Eliav Farber:
> mt25qu256a [1] uses the 4 bit Block Protection scheme and supports
> Top/Bottom protection via the BP and TB bits of the Status Register.
> BP3 is located in bit 6 of the Status Register.
> Tested on MT25QU256ABA8ESF-0SIT.
> 
> [1] 
> https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf
> 
> Signed-off-by: Eliav Farber <farbere@...zon.com>
> Link: 
> https://lore.kernel.org/lkml/20221019071631.15191-1-farbere@amazon.com

Reviewed-by: Michael Walle <michael@...le.cc>

Thanks,
-michael