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Message-ID: <5ddc1dac-b6ee-34c4-63eb-63c9a254d984@oss.nxp.com>
Date: Fri, 21 Oct 2022 17:31:50 +0800
From: Peng Fan <peng.fan@....nxp.com>
To: Marco Felsch <m.felsch@...gutronix.de>
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
shawnguo@...nel.org, s.hauer@...gutronix.de,
devicetree@...r.kernel.org, Peng Fan <peng.fan@....com>,
linux-kernel@...r.kernel.org, linux-imx@....com,
kernel@...gutronix.de, festevam@...il.com,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 05/15] arm64: dts: imx8mp-evk: enable uart1/3 ports
Hi Marco,
On 10/21/2022 5:09 PM, Marco Felsch wrote:
> On 22-10-21, Peng Fan wrote:
>> Hi Marco,
>>
>> On 10/20/2022 7:07 PM, Marco Felsch wrote:
>>> Hi Peng,
>>>
>>> On 22-10-20, Peng Fan (OSS) wrote:
>>>> From: Peng Fan <peng.fan@....com>
>>>>
>>>> Enable uart1/3 ports for evk board.
>>>>
>>>> Signed-off-by: Peng Fan <peng.fan@....com>
>>>> ---
>>>> arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 36 ++++++++++++++++++++
>>>> 1 file changed, 36 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
>>>> index 2e29bb3c041c..366f709f8790 100644
>>>> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
>>>> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
>>>> @@ -428,6 +428,15 @@ &snvs_pwrkey {
>>>> status = "okay";
>>>> };
>>>> +&uart1 { /* BT */
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_uart1>;
>>>> + assigned-clocks = <&clk IMX8MP_CLK_UART1>;
>>>> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
>>>
>>> I'm curious, what is the default parent and why is this wrong? For the
>>> already exisiting uart2 we don't do that. Same applies for uart3.
>>
>> The default parent is OSC_24M. The uart2 is for console, so 24M is ok.
>> As I recall, we met issue 24M not able to get higher baudrate.
>
> What did you mean by higher baudrate, is it everything > 115200? When
> the console baudrates can be fullfilled with the PLL1_80M as well
> wouldn't it be worth to fix the imx8mp.dtsi instead?
To console, we use 115200, 24M could fullfill it.
BaudRate = (clk / ref_clk_div) / (16 * (ubmr + 1) / (ubir + 1))
If you have 24M ref_clk, the max baudrate is 1.5M, with setting
ubmr, ubir to 0, and ref clk divider to 1.
So more higher baudrate, 24M could not fulfill.
THanks,
Peng.
>
> Regards,
> Marco
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