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Message-ID: <39c5a7cb-076a-a6ba-df27-7dee7d98a2a5@arm.com>
Date: Fri, 21 Oct 2022 11:59:27 +0100
From: James Clark <james.clark@....com>
To: John Garry <john.garry@...wei.com>
Cc: linux-kernel@...r.kernel.org, nick.forrington@....com,
al.grant@....com, Will Deacon <will@...nel.org>,
Mike Leach <mike.leach@...aro.org>,
Leo Yan <leo.yan@...aro.org>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, acme@...nel.org
Subject: Re: [PATCH] perf vendor events: Add Arm Neoverse V2 PMU events
On 21/10/2022 11:47, John Garry wrote:
> On 20/10/2022 14:45, James Clark wrote:
>> Rename the neoverse-n2 folder to make it clear that it includes V2, and
>> add V2 to mapfile.csv. V2 has the same events as N2, visible by running
>> the following command in the ARM-software/data github repo [1]:
>>
>> diff pmu/neoverse-v2.json pmu/neoverse-n2.json | grep code
>>
>> Testing:
>>
>> $ perf test pmu
>>
>> 10: PMU events :
>> 10.1: PMU event table sanity : Ok
>> 10.2: PMU event map aliases : Ok
>> 10.3: Parsing of PMU event table metrics : Ok
>> 10.4: Parsing of PMU event table metrics with fake PMUs : Ok
>>
>> [1]:https://github.com/ARM-software/data
>>
>> Signed-off-by: James Clark<james.clark@....com>
>> ---
>
> This looks ok. Out of curiosity, do you know how the naming works for
> these neoverse cores? Were "n" a predecessor to "v"?
Thanks for the review. No, they're more like different product lines
than predecessors. From the image on this article [1], N are focused on
performance per watt and V are high performance.
[1]:
https://www.arm.com/company/news/2022/09/redefining-the-global-computing-infrastructure-with-next-generation-arm-neoverse-platforms
>
> thanks,
> John
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