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Message-Id: <20221023133205.3493564-3-guoren@kernel.org>
Date:   Sun, 23 Oct 2022 09:32:05 -0400
From:   guoren@...nel.org
To:     guoren@...nel.org, palmer@...belt.com, palmer@...osinc.com,
        heiko@...ech.de, arnd@...db.de, songmuchun@...edance.com,
        catalin.marinas@....com, chenhuacai@...ngson.cn,
        Conor.Dooley@...rochip.com, paul.walmsley@...ive.com,
        aou@...s.berkeley.edu
Cc:     linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-mm@...ck.org,
        Guo Ren <guoren@...ux.alibaba.com>
Subject: [PATCH 2/2] riscv: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP

From: Guo Ren <guoren@...ux.alibaba.com>

This patch enable the feature of "free some vmemmap pages of HugeTLB
page" [1]. To make it work correct, we also need fixup PG_dcache_clean
setting for huge page [2].

[1] https://lore.kernel.org/linux-doc/20210510030027.56044-1-songmuchun@bytedance.com/
[2] https://lore.kernel.org/linux-mm/20220302084624.33340-1-songmuchun@bytedance.com/

Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
Signed-off-by: Guo Ren <guoren@...nel.org>
Cc: Muchun Song <songmuchun@...edance.com>
Cc: Huacai Chen <chenhuacai@...ngson.cn>
Cc: Arnd Bergmann <arnd@...db.de>
---
 arch/riscv/Kconfig                  | 1 +
 arch/riscv/include/asm/cacheflush.h | 3 +++
 arch/riscv/mm/cacheflush.c          | 3 +++
 3 files changed, 7 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6b48a3ae9843..81ac25b0e005 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -45,6 +45,7 @@ config RISCV
 	select ARCH_WANT_FRAME_POINTERS
 	select ARCH_WANT_GENERAL_HUGETLB
 	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
+	select ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
 	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
 	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
 	select BUILDTIME_TABLE_SORT if MMU
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index 8a5c246b0a21..96f7381aeeeb 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -17,6 +17,9 @@ static inline void local_flush_icache_all(void)
 
 static inline void flush_dcache_page(struct page *page)
 {
+	if (PageHuge(page))
+		page = compound_head(page);
+
 	if (test_bit(PG_dcache_clean, &page->flags))
 		clear_bit(PG_dcache_clean, &page->flags);
 }
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 7c9f97fa3938..ca35807cf185 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -82,6 +82,9 @@ void flush_icache_pte(pte_t pte)
 {
 	struct page *page = pte_page(pte);
 
+	if (PageHuge(page))
+		page = compound_head(page);
+
 	if (!test_bit(PG_dcache_clean, &page->flags)) {
 		flush_icache_all();
 		set_bit(PG_dcache_clean, &page->flags);
-- 
2.36.1

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