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Message-Id: <20221025144117.1010488-2-ioana.ciornei@nxp.com>
Date: Tue, 25 Oct 2022 17:41:15 +0300
From: Ioana Ciornei <ioana.ciornei@....com>
To: shawnguo@...nel.org
Cc: leoyang.li@....com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, rmk+kernel@...linux.org.uk,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Ioana Ciornei <ioana.ciornei@....com>
Subject: [PATCH 1/3] arm64: dts: lx2160a: specify clock frequencies for the MDIO controllers
Up until now, the external MDIO controller frequency values relied
either on the default ones out of reset or on those setup by u-boot.
Let's just properly specify the MDC frequency in the DTS so that even
without u-boot's intervention Linux can drive the MDIO bus.
Fixes: 6e1b8fae892d ("arm64: dts: lx2160a: add emdio1 node")
Fixes: 5705b9dcda57 ("arm64: dts: lx2160a: add emdio2 node")
Signed-off-by: Ioana Ciornei <ioana.ciornei@....com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 6680fb2a6dc9..8c76d86cb756 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -1385,6 +1385,9 @@ emdio1: mdio@...6000 {
#address-cells = <1>;
#size-cells = <0>;
little-endian;
+ clock-frequency = <2500000>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
status = "disabled";
};
@@ -1395,6 +1398,9 @@ emdio2: mdio@...7000 {
little-endian;
#address-cells = <1>;
#size-cells = <0>;
+ clock-frequency = <2500000>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
status = "disabled";
};
--
2.25.1
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