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Message-ID: <VI1P190MB0317E39BD8D5531F94EB185C95319@VI1P190MB0317.EURP190.PROD.OUTLOOK.COM>
Date: Tue, 25 Oct 2022 15:52:32 +0300
From: Vadym Kochan <vadym.kochan@...ision.eu>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: Elad Nachman <enachman@...vell.com>,
Chris Packham <chris.packham@...iedtelesis.co.nz>
Subject: Re: [PATCH v4 1/2] dt-bindings: mtd: marvell-nand: Convert to YAML DT
scheme
On Tue, 25 Oct 2022 08:25:01 -0400, Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> wrote:
> On 25/10/2022 06:17, Vadym Kochan wrote:
> > Switch the DT binding to a YAML schema to enable the DT validation.
> >
> > Dropped deprecated compatibles and properties described in txt file.
> >
> > Signed-off-by: Vadym Kochan <vadym.kochan@...ision.eu>
> > ---
> >
> > v4:
> > 1) Remove "label" and "partitions" properties
>
> I think you did not read the feedback.
>
>
> (...)
>
> > +
> > + marvell,system-controller:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description: Syscon node that handles NAND controller related registers
> > +
> > +patternProperties:
> > + "^nand@[0-3]$":
> > + type: object
> > + properties:
> > + reg:
> > + minimum: 0
> > + maximum: 3
> > +
> > + nand-rb:
> > + minimum: 0
> > + maximum: 1
> > +
> > + nand-ecc-strength:
> > + enum: [1, 4, 8]
> > +
> > + nand-on-flash-bbt: true
> > +
> > + nand-ecc-mode: true
> > +
> > + nand-ecc-algo:
> > + description: |
> > + This property is essentially useful when not using hardware ECC.
> > + Howerver, it may be added when using hardware ECC for clarification
> > + but will be ignored by the driver because ECC mode is chosen depending
> > + on the page size and the strength required by the NAND chip.
> > + This value may be overwritten with nand-ecc-strength property.
> > +
> > + nand-ecc-step-size:
> > + description: |
> > + Marvell's NAND flash controller does use fixed strength
> > + (1-bit for Hamming, 16-bit for BCH), so the actual step size
> > + will shrink or grow in order to fit the required strength.
> > + Step sizes are not completely random for all and follow certain
> > + patterns described in AN-379, "Marvell SoC NFC ECC".
> > +
> > + marvell,nand-keep-config:
> > + description: |
> > + Orders the driver not to take the timings from the core and
> > + leaving them completely untouched. Bootloader timings will then
> > + be used.
> > + $ref: /schemas/types.yaml#/definitions/flag
> > +
> > + marvell,nand-enable-arbiter:
> > + description: |
> > + To enable the arbiter, all boards blindly used it,
> > + this bit was set by the bootloader for many boards and even if
> > + it is marked reserved in several datasheets, it might be needed to set
> > + it (otherwise it is harmless) so whether or not this property is set,
> > + the bit is selected by the driver.
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + deprecated: true
> > +
> > + required:
> > + - reg
> > + - nand-rb
>
> I have no clue why you are doing some random changes. Now you dropped
> additionalProperties for nand@ about which no one asked you to drop.
>
> No. It *must* be here.
Sorry for this mess, I was confused with the "label" and "partitions"
because I got errors about these properties when I used only
"additionalProperties: false", so I tried to put reference to partition.yaml.
Then I looked at other nand-controllers schemas and I did not find inclusion of partition.yaml
for them so I decided to just drop it at all. My understanding is that "additionalProperties:false"
is needed for nand@ if to have "label" and "partitions" properties, otherwise it is not needed.
>
> Best regards,
> Krzysztof
>
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