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Message-ID: <5b91c0eb-52aa-8431-c286-81b7feae84ce@intel.com>
Date: Tue, 25 Oct 2022 16:10:44 +0300
From: Adrian Hunter <adrian.hunter@...el.com>
To: Brian Norris <briannorris@...omium.org>,
Ulf Hansson <ulf.hansson@...aro.org>
Cc: Shawn Lin <shawn.lin@...k-chips.com>, linux-mmc@...r.kernel.org,
Al Cooper <alcooperx@...il.com>,
Bjorn Andersson <andersson@...nel.org>,
Sowjanya Komatineni <skomatineni@...dia.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>,
Sascha Hauer <s.hauer@...gutronix.de>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Florian Fainelli <f.fainelli@...il.com>,
NXP Linux Team <linux-imx@....com>,
Thierry Reding <thierry.reding@...il.com>,
Fabio Estevam <festevam@...il.com>,
Michal Simek <michal.simek@...inx.com>,
linux-kernel@...r.kernel.org, Shawn Guo <shawnguo@...nel.org>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
linux-arm-msm@...r.kernel.org, Haibo Chen <haibo.chen@....com>,
Andy Gross <agross@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
Faiz Abbas <faiz_abbas@...com>,
Jonathan Hunter <jonathanh@...dia.com>
Subject: Re: [PATCH v3 6/7] mmc: sdhci_am654: Fix SDHCI_RESET_ALL for CQHCI
On 24/10/22 20:55, Brian Norris wrote:
> [[ NOTE: this is completely untested by the author, but included solely
> because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
> SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
> drivers using CQHCI might benefit from a similar change, if they
> also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
> bug on at least MSM, Arasan, and Intel hardware. ]]
>
> SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
> tracking that properly in software. When out of sync, we may trigger
> various timeouts.
>
> It's not typical to perform resets while CQE is enabled, but this may
> occur in some suspend or error recovery scenarios.
>
> Include this fix by way of the new sdhci_and_cqhci_reset() helper.
>
> Fixes: f545702b74f9 ("mmc: sdhci_am654: Add Support for Command Queuing Engine to J721E")
> Signed-off-by: Brian Norris <briannorris@...omium.org>
> ---
>
> Changes in v3:
> - Use new SDHCI+CQHCI helper
>
> drivers/mmc/host/sdhci_am654.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
> index 8f1023480e12..6a282c7a221e 100644
> --- a/drivers/mmc/host/sdhci_am654.c
> +++ b/drivers/mmc/host/sdhci_am654.c
> @@ -15,6 +15,7 @@
> #include <linux/sys_soc.h>
>
> #include "cqhci.h"
> +#include "sdhci-cqhci.h"
> #include "sdhci-pltfm.h"
>
> /* CTL_CFG Registers */
> @@ -378,7 +379,7 @@ static void sdhci_am654_reset(struct sdhci_host *host, u8 mask)
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);
>
> - sdhci_reset(host, mask);
> + sdhci_and_cqhci_reset(host, mask);
>
> if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) {
> ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
What about sdhci_reset in sdhci_am654_ops ?
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