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Message-ID: <dc787f32-a59c-db5e-37da-3659ae265380@intel.com>
Date:   Tue, 25 Oct 2022 16:10:26 +0300
From:   Adrian Hunter <adrian.hunter@...el.com>
To:     Brian Norris <briannorris@...omium.org>,
        Ulf Hansson <ulf.hansson@...aro.org>
Cc:     Shawn Lin <shawn.lin@...k-chips.com>, linux-mmc@...r.kernel.org,
        Al Cooper <alcooperx@...il.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Sowjanya Komatineni <skomatineni@...dia.com>,
        Broadcom internal kernel review list 
        <bcm-kernel-feedback-list@...adcom.com>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Thierry Reding <thierry.reding@...il.com>,
        Fabio Estevam <festevam@...il.com>,
        Michal Simek <michal.simek@...inx.com>,
        linux-kernel@...r.kernel.org, Shawn Guo <shawnguo@...nel.org>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        linux-arm-msm@...r.kernel.org, Haibo Chen <haibo.chen@....com>,
        Andy Gross <agross@...nel.org>,
        linux-arm-kernel@...ts.infradead.org,
        Faiz Abbas <faiz_abbas@...com>,
        Jonathan Hunter <jonathanh@...dia.com>
Subject: Re: [PATCH v3 5/7] mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI

On 24/10/22 20:54, Brian Norris wrote:
>  [[ NOTE: this is completely untested by the author, but included solely
>     because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
>     SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
>     drivers using CQHCI might benefit from a similar change, if they
>     also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
>     bug on at least MSM, Arasan, and Intel hardware. ]]
> 
> SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
> tracking that properly in software. When out of sync, we may trigger
> various timeouts.
> 
> It's not typical to perform resets while CQE is enabled, but this may
> occur in some suspend or error recovery scenarios.
> 
> Include this fix by way of the new sdhci_and_cqhci_reset() helper.
> 
> Fixes: 3c4019f97978 ("mmc: tegra: HW Command Queue Support for Tegra SDMMC")
> Signed-off-by: Brian Norris <briannorris@...omium.org>

This patch is dependent on "mmc: cqhci: Provide
helper for resetting both SDHCI and CQHCI".  Best point that out
in this commit message as well.

Otherwise:

Acked-by: Adrian Hunter <adrian.hunter@...el.com>

> ---
> 
> Changes in v3:
>  - Use new SDHCI+CQHCI helper
> 
> Changes in v2:
>  - Drop unnecessary 'enable_hwcq' check
> 
>  drivers/mmc/host/sdhci-tegra.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index 413925bce0ca..c71000a07656 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -28,6 +28,7 @@
>  
>  #include <soc/tegra/common.h>
>  
> +#include "sdhci-cqhci.h"
>  #include "sdhci-pltfm.h"
>  #include "cqhci.h"
>  
> @@ -367,7 +368,7 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
>  	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
>  	u32 misc_ctrl, clk_ctrl, pad_ctrl;
>  
> -	sdhci_reset(host, mask);
> +	sdhci_and_cqhci_reset(host, mask);
>  
>  	if (!(mask & SDHCI_RESET_ALL))
>  		return;

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