linux-kernel - Re: [PATCH] pwm: mediatek: always use bus clock for PWM on MT7622

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Message-ID: <eb47aba9-e5d9-9f27-06ae-cf386b291b05@collabora.com>
Date:   Fri, 28 Oct 2022 10:39:31 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Daniel Golle <daniel@...rotopia.org>, linux-pwm@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Thierry Reding <thierry.reding@...il.com>,
        Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
        Matthias Brugger <matthias.bgg@...il.com>
Cc:     Fabien Parent <fparent@...libre.com>,
        Zhi Mao <zhi.mao@...iatek.com>,
        Sam Shih <sam.shih@...iatek.com>
Subject: Re: [PATCH] pwm: mediatek: always use bus clock for PWM on MT7622

Il 26/10/22 02:56, Daniel Golle ha scritto:
> According to MT7622 Reference Manual for Development Board v1.0 the PWM
> unit found in the MT7622 SoC also comes with the PWM_CK_26M_SEL register
> at offset 0x210 just like other modern MediaTek ARM64 SoCs.
> And also MT7622 sets that register to 0x00000001 on reset which is
> described as 'Select 26M fix CLK as BCLK' in the datasheet.
> Hence set has_ck_26m_sel to true also for MT7622 which results in the
> driver writing 0 to the PWM_CK_26M_SEL register which is described as
> 'Select bus CLK as BCLK'.
> 
> Fixes: 0c0ead76235db0 ("pwm: mediatek: Always use bus clock")
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>