linux-kernel - Re: [PATCH v3] dt-bindings: iio: dac: Change the I2C slave address for ds4422/4424 to its correct value

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Message-ID: <20221029132508.515ad955@jic23-huawei>
Date:   Sat, 29 Oct 2022 13:25:08 +0100
From:   Jonathan Cameron <jic23@...nel.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Rajat Khandelwal <rajat.khandelwal@...ux.intel.com>,
        lars@...afoo.de, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, ihkose@...il.com,
        linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, rajat.khandelwal@...el.com
Subject: Re: [PATCH v3] dt-bindings: iio: dac: Change the I2C slave address
 for ds4422/4424 to its correct value

On Sun, 23 Oct 2022 19:23:09 -0400
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> wrote:

> On 24/10/2022 13:50, Rajat Khandelwal wrote:
> > The datasheet states that the slave address for the device is 0x20
> > when the pins A0 and A1 are ground. The DT binding has been using
> > 0x10 as the value and I think it should be 0x20 as per datasheet.
> > 
> > Signed-off-by: Rajat Khandelwal <rajat.khandelwal@...ux.intel.com>
> > ---  
> 
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> 

hmm. This is curious. So the datasheet indeed provides a table saying
grounding both pins sets the address to 0x20, however take a look at
Figure 2 which says the address is
A1 | A0 | 1 | 0 | 0 | 0 | 0

or 0x10 as per the example.  My guess is someone forgot that i2c addresses
are 7 bits and the lowest bit of the first byte is used for R/W control.

So unless we have this verified on hardware (implying that the address table
is correct in this sense) I'm not keen to take this.
I doubt that is the case given it has 8 bit addresses (0xe0) and i2c addresses
are 7 bits.

Jonathan


> Best regards,
> Krzysztof
>