lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DM6PR04MB6575D8A39219420494192B76FC349@DM6PR04MB6575.namprd04.prod.outlook.com>
Date:   Sun, 30 Oct 2022 11:43:10 +0000
From:   Avri Altman <Avri.Altman@....com>
To:     Bart Van Assche <bvanassche@....org>,
        Asutosh Das <quic_asutoshd@...cinc.com>,
        "quic_cang@...cinc.com" <quic_cang@...cinc.com>,
        "martin.petersen@...cle.com" <martin.petersen@...cle.com>,
        "linux-scsi@...r.kernel.org" <linux-scsi@...r.kernel.org>
CC:     "quic_nguyenb@...cinc.com" <quic_nguyenb@...cinc.com>,
        "quic_xiaosenh@...cinc.com" <quic_xiaosenh@...cinc.com>,
        "stanley.chu@...iatek.com" <stanley.chu@...iatek.com>,
        "eddie.huang@...iatek.com" <eddie.huang@...iatek.com>,
        "daejun7.park@...sung.com" <daejun7.park@...sung.com>,
        "mani@...nel.org" <mani@...nel.org>,
        "beanhuo@...ron.com" <beanhuo@...ron.com>,
        "quic_richardp@...cinc.com" <quic_richardp@...cinc.com>,
        "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        "James E.J. Bottomley" <jejb@...ux.ibm.com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Jinyoung Choi <j-young.choi@...sung.com>,
        Kiwoong Kim <kwmad.kim@...sung.com>,
        open list <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 07/17] ufs: core: mcq: Calculate queue depth

> On 10/20/22 11:03, Asutosh Das wrote:
> > +u32 ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba)
> > +{
> > +     u32 qd, val;
> > +     int mac;
> > +
> > +     mac = ufshcd_mcq_vops_get_hba_mac(hba);
> > +     if (mac < 0) {
> > +             val = ufshcd_readl(hba, REG_UFS_MCQ_CFG);
> > +             mac = FIELD_GET(MCQ_CFG_MAC_MASK, val);
> > +     }
> 
> According to the UFSHCI 4.0 specification the MAC value is set by the
> host. Can the above code read the MAC value from the host controller
> before it has been set by the host? If so, how about leaving out the
> code that reads the MAC value from the controller and making it
> mandatory to implement the new get_hba_mac vop?
> 
> > +
> > +     /*  MAC is a 0 based value. */
> > +     mac += 1;
> > +     /* max. value of bqueuedepth = 256, mac is host dependent */
> 
> host dependent -> defined by the host controller?
> 
> > +     qd = min_t(u32, mac, hba->dev_info.bqueuedepth);
> > +     if (!qd)
> > +             qd = mac;
Isn't if mcq is supported bqueuedepth can't be zero?
The device must implements the shared queueing architecture.

Thanks,
Avri

> 
> How about using min_not_zero() instead of open-coding it?
> 
> Thanks,
> 
> Bart.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ