linux-kernel - [PATCH 2/3] arm64: dts: renesas: r9a09g011: Add watchdog node

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Message-Id: <20221103223956.50575-3-fabrizio.castro.jz@renesas.com>
Date:   Thu,  3 Nov 2022 22:39:55 +0000
From:   Fabrizio Castro <fabrizio.castro.jz@...esas.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Guenter Roeck <linux@...ck-us.net>,
        Geert Uytterhoeven <geert+renesas@...der.be>
Cc:     Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
        Magnus Damm <magnus.damm@...il.com>,
        Biju Das <biju.das.jz@...renesas.com>,
        linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-watchdog@...r.kernel.org,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>,
        Fabrizio Castro <fabrizio.castro@...renesas.com>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Jacopo Mondi <jacopo@...ndi.org>
Subject: [PATCH 2/3] arm64: dts: renesas: r9a09g011: Add watchdog node

The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs,
but Linux is only allowed one.

Add a node for the watchdog allowed to Linux to the SoC
specific dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
index fb1a97202c38..9859c717bd10 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
@@ -161,6 +161,19 @@ uart0: serial@...40000 {
 			status = "disabled";
 		};
 
+		wdt0: watchdog@...50000 {
+			compatible = "renesas,r9a09g011-wdt",
+				     "renesas,rzv2m-wdt";
+			reg = <0 0xa4050000 0 0x80>;
+			clocks = <&cpg CPG_MOD R9A09G011_WDT0_PCLK>,
+				 <&cpg CPG_MOD R9A09G011_WDT0_CLK>;
+			clock-names = "pclk", "oscclk";
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+			resets = <&cpg R9A09G011_WDT0_PRESETN>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		pinctrl: pinctrl@...50000 {
 			compatible = "renesas,r9a09g011-pinctrl";
 			reg = <0 0xb6250000 0 0x800>;
-- 
2.34.1