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Message-ID: <95287691-752f-5920-2dbc-b9a5b144d0ac@rivosinc.com>
Date: Tue, 8 Nov 2022 09:17:26 -0800
From: Vineet Gupta <vineetg@...osinc.com>
To: Conor Dooley <conor.dooley@...rochip.com>,
Vineet Gupta <vineetg@...osinc.com>
Cc: Björn Töpel <bjorn@...nel.org>,
Chris Stillson <stillson@...osinc.com>,
Greentime Hu <greentime.hu@...ive.com>,
Guo Ren <guoren@...ux.alibaba.com>,
Vincent Chen <vincent.chen@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Guo Ren <guoren@...nel.org>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Andy Chiu <andy.chiu@...ive.com>
Subject: Re: [PATCH v12 04/17] riscv: Add vector feature to compile
On 11/7/22 23:56, Conor Dooley wrote:
> On Mon, Nov 07, 2022 at 04:04:28PM -0800, Vineet Gupta wrote:
>> +CC Andy, Conor
>>
>> On 11/7/22 09:21, Björn Töpel wrote:
>>>> +config VECTOR
>>>> + bool "VECTOR support"
>>>> + depends on GCC_VERSION >= 120000 || CLANG_VERSION >= 130000
>>>> + default n
>>>> + help
>>>> + Say N here if you want to disable all vector related procedure
>>>> + in the kernel.
>>>> +
>>>> + If you don't know what to do here, say Y.
>>>> +
>>>> +endmenu
>>> "VECTOR" is not really consistent to how the other configs are named;
>>> RISCV_ISA_V, RISCV_ISA_VECTOR, RISCV_VECTOR?
>>
>> Good point, I've changed it to RISCV_ISA_V to keep it consistent with
>> existing RISCV_ISA_C.
>
> Hey Vineet, kinda randomly replying here but the wording makes it look
> like you're going to take this patchset on?
> If so, please check out v10 (think it was from April) as there are some
> comments on that version that IIRC remain un-resolved.
Sure thing. Although I only see a few from Christoph and kernel build bot.
-Vineet
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