linux-kernel - Re: [PATCH 1/5] cacheinfo: Use riscv's init_cache

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Message-ID: <Y2qQABd9Xsubx77Q@spud>
Date:   Tue, 8 Nov 2022 17:21:04 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Sudeep Holla <sudeep.holla@....com>
Cc:     Conor Dooley <conor.dooley@...rochip.com>,
        Pierre Gondois <pierre.gondois@....com>,
        linux-kernel@...r.kernel.org,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Len Brown <lenb@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Gavin Shan <gshan@...hat.com>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Jani Nikula <jani.nikula@...el.com>,
        Jakub Kicinski <kuba@...nel.org>,
        linux-arm-kernel@...ts.infradead.org,
        linux-riscv@...ts.infradead.org, linux-acpi@...r.kernel.org
Subject: Re: [PATCH 1/5] cacheinfo: Use riscv's init_cache_level() as generic
 OF implem

On Tue, Nov 08, 2022 at 03:59:06PM +0000, Sudeep Holla wrote:
> On Tue, Nov 08, 2022 at 02:07:41PM +0000, Conor Dooley wrote:
> > On Tue, Nov 08, 2022 at 12:04:17PM +0100, Pierre Gondois wrote:
> > > Riscv's implementation of init_of_cache_level() is following
> > 
> > heh, "Riscv" always looks a bit odd!
> > Code movement looks fine, nothing surface level is broken on RISC-V.
> > Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> >
> Thanks for the review and testing. I was planning to ask Pierre to cc you
> next time but you seem to have covered that for me :).

Ye no worries.
Feel free to add some sort of "R: Conor Dooley <conor@...nel.org>" entry
where appropriate if you want to make sure I'll take a look - but I
should see it anyway if it goes to the riscv list.
Up to you.