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Message-Id: <166787129211.608852.3612758150409416915.b4-ty@kernel.org>
Date:   Mon,  7 Nov 2022 19:34:59 -0600
From:   Bjorn Andersson <andersson@...nel.org>
To:     agross@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        martin.botka@...ainline.org, linux-kernel@...r.kernel.org,
        robh+dt@...nel.org, devicetree@...r.kernel.org,
        krzysztof.kozlowski@...aro.org, konrad.dybcio@...ainline.org,
        linux-arm-msm@...r.kernel.org
Subject: Re: [RESEND PATCH] arm64: dts: qcom: sm6125: fix SDHCI CQE reg names

On Wed, 26 Oct 2022 12:36:46 -0400, Krzysztof Kozlowski wrote:
> SM6125 comes with SDCC (SDHCI controller) v5, so the second range of
> registers is cqhci, not core.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm6125: fix SDHCI CQE reg names
      commit: 3de1172624b3c4ca65730bc34333ab493510b3e1

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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