linux-kernel - RE: [PATCH v5 2/2] dt-bindings: PCI: xilinx-nwl: Convert to YAML schemas of Xilinx NWL PCIe Root Port Bridge

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Message-ID: <CY4PR1201MB013577DE905AF12D1F5E03BA8B3E9@CY4PR1201MB0135.namprd12.prod.outlook.com>
Date:   Wed, 9 Nov 2022 04:33:19 +0000
From:   "Havalige, Thippeswamy" <thippeswamy.havalige@....com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC:     "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "michals@...inx.com" <michals@...inx.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "Yeleswarapu, Nagaradhesh" <nagaradhesh.yeleswarapu@....com>,
        "Gogada, Bharat Kumar" <bharat.kumar.gogada@....com>
Subject: RE: [PATCH v5 2/2] dt-bindings: PCI: xilinx-nwl: Convert to YAML
 schemas of Xilinx NWL PCIe Root Port Bridge

Hi,

> > +  dma-coherent:
> > +    description: Optional, present if DMA operations are coherent
> > +
> > +  clocks:
> > +    description: Optional, input clock specifier.
> 
> This is a friendly reminder during the review process.
> 
> It seems my previous comments were not fully addressed. Maybe my
> feedback got lost between the quotes, maybe you just forgot to apply it.
> Please go back to the previous discussion and either implement all requested
> changes or keep discussing them.
> 
> Hint: same comment as v3.

Sorry I assumed it only for 'Input' and not Optional.

Regards,
Thippeswamy H