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Message-ID: <c8a480c3-7bce-8e83-c0e6-6b29f32211d8@linaro.org>
Date: Thu, 10 Nov 2022 16:30:25 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm8450: drop incorrect
spi-max-frequency
On 10/11/2022 16:27, Krzysztof Kozlowski wrote:
> spi-max-frequency is a property of SPI device, not the controller:
>
> qcom/sm8450-hdk.dtb: geniqup@...000: spi@...000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 7 -------
> 1 file changed, 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 9bdda0163573..e9f34c102a6f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -794,7 +794,6 @@ spi15: spi@...000 {
> interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&qup_spi15_data_clk>, <&qup_spi15_cs>;
> - spi-max-frequency = <50000000>;
> interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
> <&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
> interconnect-names = "qup-core", "qup-config";
> @@ -834,7 +833,6 @@ spi16: spi@...000 {
> interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&qup_spi16_data_clk>, <&qup_spi16_cs>;
> - spi-max-frequency = <50000000>;
> interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
> <&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
> interconnect-names = "qup-core", "qup-config";
> @@ -874,7 +872,6 @@ spi17: spi@...000 {
> interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&qup_spi17_data_clk>, <&qup_spi17_cs>;
> - spi-max-frequency = <50000000>;
> interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
> <&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
> interconnect-names = "qup-core", "qup-config";
> @@ -914,7 +911,6 @@ spi18: spi@...000 {
> interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&qup_spi18_data_clk>, <&qup_spi18_cs>;
> - spi-max-frequency = <50000000>;
> interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
> <&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
> interconnect-names = "qup-core", "qup-config";
> @@ -954,7 +950,6 @@ spi19: spi@...000 {
> interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&qup_spi19_data_clk>, <&qup_spi19_cs>;
> - spi-max-frequency = <50000000>;
> interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
> <&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
> interconnect-names = "qup-core", "qup-config";
> @@ -1007,7 +1002,6 @@ spi20: spi@...000 {
> interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&qup_spi20_data_clk>, <&qup_spi20_cs>;
> - spi-max-frequency = <50000000>;
> interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
> <&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
> interconnect-names = "qup-core", "qup-config";
> @@ -1047,7 +1041,6 @@ spi21: spi@...000 {
> interrupts = <GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH>;
> pinctrl-names = "default";
> pinctrl-0 = <&qup_spi21_data_clk>, <&qup_spi21_cs>;
> - spi-max-frequency = <50000000>;
> interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>,
> <&system_noc MASTER_A2NOC_SNOC 0 &gem_noc SLAVE_LLCC 0>;
> interconnect-names = "qup-core", "qup-config";
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