[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b39171e6-4af3-6102-2207-aad57dc92226@linux.intel.com>
Date: Mon, 14 Nov 2022 16:35:35 +0800
From: Xing Zhengjun <zhengjun.xing@...ux.intel.com>
To: Jing Zhang <renyu.zj@...ux.alibaba.com>,
linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
John Garry <john.garry@...wei.com>,
Will Deacon <will@...nel.org>,
James Clark <james.clark@....com>,
Mike Leach <mike.leach@...aro.org>,
Leo Yan <leo.yan@...aro.org>
Cc: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Andrew Kilroy <andrew.kilroy@....com>,
Shuai Xue <xueshuai@...ux.alibaba.com>,
Zhuo Song <zhuo.song@...ux.alibaba.com>
Subject: Re: [RFC PATCH v2 3/6] perf vendor events arm64: Add cache metrics
for neoverse-n2
On 11/14/2022 3:41 PM, Jing Zhang wrote:
> Add cache related metrics.
>
> Signed-off-by: Jing Zhang <renyu.zj@...ux.alibaba.com>
> ---
> .../arch/arm64/arm/neoverse-n2/metrics.json | 77 ++++++++++++++++++++++
> 1 file changed, 77 insertions(+)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> index 324ca12..1690ef6 100644
> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
> @@ -54,5 +54,82 @@
> "BriefDescription": "The rate of DTLB Walks to the overall TLB lookups",
> "MetricGroup": "TLB",
> "MetricName": "dtlb_walk_rate"
> + },
> + {
> + "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L1 I-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L1 I-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l1i_cache_mpki"
> + },
> + {
> + "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE",
> + "PublicDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
> + "BriefDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l1i_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L1 D-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L1 D-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l1d_cache_mpki"
> + },
> + {
> + "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE",
> + "PublicDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
> + "BriefDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l1d_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L2 D-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L2 D-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l2d_cache_mpki"
> + },
> + {
> + "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE",
> + "PublicDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
> + "BriefDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l2d_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of L3 D-Cache misses per kilo instructions",
> + "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "l3d_cache_mpki"
> + },
> + {
> + "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE",
> + "PublicDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
> + "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
> + "MetricGroup": "Cache",
> + "MetricName": "l3d_cache_miss_rate"
> + },
> + {
> + "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000",
> + "PublicDescription": "The rate of LL Cache read misses per kilo instructions",
> + "BriefDescription": "The rate of LL Cache read misses per kilo instructions",
> + "MetricGroup": "Cache",
> + "MetricName": "ll_cache_read_mpki"
> + },
> + {
> + "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD",
> + "PublicDescription": "The rate of LL Cache read misses to the overall LL Cache read",
> + "BriefDescription": "The rate of LL Cache read misses to the overall LL Cache read",
> + "MetricGroup": "Cache",
> + "MetricName": "ll_cache_read_miss_rate"
> + },
> + {
> + "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD",
> + "PublicDescription": "The rate of LL Cache read hit to the overall LL Cache read",
> + "BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read",
> + "MetricGroup": "Cache",
> + "MetricName": "ll_cache_read_hit_rate"
> }
> ]
> \ No newline at end of file
It is better to fix this by adding a newline at the end of the file.
--
Zhengjun Xing
Powered by blists - more mailing lists