linux-kernel - Re: [PATCH v2 1/2] x86/of: Add support for boot time interrupt delivery mode configuration

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <7efa66ec-8aa7-d44f-fae3-ee4f82d8f157@maxlinear.com>
Date:   Wed, 16 Nov 2022 11:25:47 +0000
From:   Rahul Tanwar <rtanwar@...linear.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
CC:     "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "robh@...nel.org" <robh@...nel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "bp@...en8.de" <bp@...en8.de>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "hpa@...or.com" <hpa@...or.com>,
        "alan@...rguk.ukuu.org.uk" <alan@...rguk.ukuu.org.uk>,
        "dirk.brandewie@...il.com" <dirk.brandewie@...il.com>,
        "grant.likely@...retlab.ca" <grant.likely@...retlab.ca>,
        "sodaville@...utronix.de" <sodaville@...utronix.de>,
        "devicetree-discuss@...ts.ozlabs.org" 
        <devicetree-discuss@...ts.ozlabs.org>,
        linux-lgm-soc <linux-lgm-soc@...linear.com>
Subject: Re: [PATCH v2 1/2] x86/of: Add support for boot time interrupt
 delivery mode configuration

On 16/11/2022 6:42 pm, Andy Shevchenko wrote:
> This email was sent from outside of MaxLinear.
> 
> On Wed, Nov 16, 2022 at 06:28:20PM +0800, Rahul Tanwar wrote:
>  > Presently, init/boot time interrupt delivery mode is enumerated
>  > only for ACPI enabled systems by parsing MADT table or for older
>  > systems by parsing MP table. But for OF based x86 systems, it is
>  > assumed & hardcoded to legacy PIC mode. This is a bug for
>  > platforms which are OF based but do not use 8259 compliant legacy
>  > PIC interrupt controller. Such platforms can not even boot because
>  > of this bug/hardcoding.
>  >
>  > Fix this bug by adding support for configuration of init time
>  > interrupt delivery mode for x86 OF based systems by introducing a
>  > new optional boolean property 'intel,virtual-wire-mode' for
>  > interrupt-controller node of local APIC. This property emulates
>  > IMCRP Bit 7 of MP feature info byte 2 of MP floating pointer
>  > structure [1].
>  >
>  > Defaults to legacy PIC mode if absent. Configures it to virtual
>  > wire compatibility mode if present.
> 
>  > [1] 
> https://www.manualslib.com/manual/77733/Intel-Multiprocessor.html?page=40#manual <https://www.manualslib.com/manual/77733/Intel-Multiprocessor.html?page=40#manual>
> 
> Link: ?


Rechecked. Link URL works for me. Am i missing any standard practice to 
add URL links in commit log ?



> 
> ...
> 
>  > + if (of_property_read_bool(dn, "intel,virtual-wire-mode")) {
> 
> You need a separate patch to show this property being added (yes,
> I have just commented on your patch 2).
> 
>  > + printk(KERN_NOTICE "Virtual Wire compatibility mode.\n");
>  > + pic_mode = 0;
>  > + } else {
>  > + printk(KERN_NOTICE "IMCR and PIC compatibility mode.\n");
>  > + pic_mode = 1;
> 
> Why not pr_notice() in both cases?

Reset of the file uses printk(KERN_xxx ""). In v1, i used pr_notice() 
but on reviewing again found it to be odd one out in the file. So 
switched to printk(KERN_xxx ""). I can revert back to using pr_notice() 
if you think that's a better fit. Thanks.

Regards,
Rahul

> 
>  > + }
> 
> -- 
> With Best Regards,
> Andy Shevchenko
>