linux-kernel - Re: [PATCH v1 3/4] soc: starfive: Add StarFive JH71XX pmu driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <Y3fe0LbZlOX1Dcw5@spud>
Date:   Fri, 18 Nov 2022 19:36:48 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Walker Chen <walker.chen@...rfivetech.com>,
        Arnd Bergmann <arnd@...db.de>
Cc:     linux-riscv@...ts.infradead.org, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor.dooley@...rochip.com>,
        "Rafael J . Wysocki" <rafael@...nel.org>,
        linux-kernel@...r.kernel.org,
        Emil Renner Berthing <kernel@...il.dk>
Subject: Re: [PATCH v1 3/4] soc: starfive: Add StarFive JH71XX pmu driver

Hey Walker,

On Fri, Nov 18, 2022 at 09:32:15PM +0800, Walker Chen wrote:
> Add generic power domain driver for the StarFive JH71XX SoC.
> 
> Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>
> ---
>  MAINTAINERS                       |   8 +

> diff --git a/MAINTAINERS b/MAINTAINERS
> index a70c1d0f303e..112f1e698723 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19623,6 +19623,14 @@ F:	Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
>  F:	drivers/reset/starfive/
>  F:	include/dt-bindings/reset/starfive*
>  
> +STARFIVE JH71XX PMU CONTROLLER DRIVER
> +M:	Walker Chen <walker.chen@...rfivetech.com>
> +S:	Maintained

Should this be supported? (ditto the other series that you guys have
sent out in the last few days)

> +F:	Documentation/devicetree/bindings/power/starfive*
> +F:	drivers/soc/starfive/jh71xx_pmu.c
> +F:	include/soc/starfive/pm_domains.h
> +F:	include/dt-bindings/power/jh7110-power.h

I noticed that you have not CCed Arnd on these patches, which makes me
wonder how do you intend getting these patches applied?
Until now, Palmer has mostly merged RISC-V drivers/soc patches, but in
the last few days I've taken over for drivers/soc/{sifive,microchip}.

Are you going to send PRs for this stuff to Arnd, or would you like me
to apply patches for drivers/soc/startech? I happy to do that for you if
you like.

If you're going to send pull requests, I am not sure if Arnd requires
GPG signed tags for them. Arnd?

Otherwise, if you want me to take them, please add something like the
following, in addition to the entry your series already adds for the
specific driver:
STARFIVE SOC DRIVERS
M:	Conor Dooley <conor@...nel.org>
S:	Maintained
T:	git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
F:	drivers/soc/starfive/
F:	include/soc/starfive/

Thanks,
Conor.