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Message-ID: <Y3yf2OWt6nE4xVVi@smile.fi.intel.com>
Date: Tue, 22 Nov 2022 12:09:28 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Rahul Tanwar <rtanwar@...linear.com>
Cc: "bigeasy@...utronix.de" <bigeasy@...utronix.de>,
"robh@...nel.org" <robh@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"bp@...en8.de" <bp@...en8.de>, "x86@...nel.org" <x86@...nel.org>,
"hpa@...or.com" <hpa@...or.com>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-lgm-soc <linux-lgm-soc@...linear.com>
Subject: Re: [PATCH v3 1/4] x86/of: Convert Intel's APIC bindings to YAML
schema
On Tue, Nov 22, 2022 at 09:43:12AM +0000, Rahul Tanwar wrote:
> On 22/11/2022 5:11 pm, Andy Shevchenko wrote:
> > On Tue, Nov 22, 2022 at 03:39:07PM +0800, Rahul Tanwar wrote:
...
> > > + first appeared in CE4100 SoC. See bindings/x86/ce4100.txt for more
> >
> > Shouldn't you change this?
>
> Do you mean change compatibility property prefix from
> "intel,ce4100-ioapic" to "intel,ioapic"? If yes, then i totally agree
> and i will change it (including new file names & all other references to
> ce4100). If not, please clarify more..
I specifically emphasized a single line (by putting blank lines around).
For your convenience I removed the unneeded parts of the context, so you can
see better what I meant.
...
> > > + first appeared in CE4100 SoC. See bindings/x86/ce4100.txt for more
Ditto.
--
With Best Regards,
Andy Shevchenko
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