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Message-ID: <37d5a252-6540-7ba1-41f0-f68cb1c817d1@starfivetech.com>
Date:   Tue, 22 Nov 2022 09:26:34 +0800
From:   Hal Feng <hal.feng@...rfivetech.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        <linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-clk@...r.kernel.org>
CC:     Conor Dooley <conor@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Stephen Boyd <sboyd@...nel.org>,
        "Michael Turquette" <mturquette@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 08/14] dt-bindings: reset: Add StarFive JH7110 system
 and always-on reset definitions

On Mon, 21 Nov 2022 09:50:13 +0100, Krzysztof Kozlowski wrote:
> On 18/11/2022 02:06, Hal Feng wrote:
> > From: Emil Renner Berthing <kernel@...il.dk>
> > 
> > Add resets for the StarFive JH7110 system (SYS) and always-on (AON)
> > reset controller.
> > 
> > Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> > Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> > ---
> >  MAINTAINERS                                 |   5 +-
> >  include/dt-bindings/reset/starfive-jh7110.h | 154 ++++++++++++++++++++
> >  2 files changed, 157 insertions(+), 2 deletions(-)
> >  create mode 100644 include/dt-bindings/reset/starfive-jh7110.h
> > 
> 
> Thank you for your patch. There is something to discuss/improve.
> 
> > +#define JH7110_SYSRST_TIMER0			118
> > +#define JH7110_SYSRST_TIMER1			119
> > +#define JH7110_SYSRST_TIMER2			120
> > +#define JH7110_SYSRST_TIMER3			121
> > +#define JH7110_SYSRST_INT_CTRL_APB		122
> > +#define JH7110_SYSRST_TEMP_APB			123
> > +#define JH7110_SYSRST_TEMP_CORE			124
> > +#define JH7110_SYSRST_JTAG_CERTIFICATION	125
> > +
> > +#define	JH7110_SYSRST_END			126
> 
> Drop weird indentation in the middle of syntax.

Will fix it.

> 
> > +
> > +/* AONCRG resets */
> > +#define JH7110_AONRST_GMAC0_AXI			0
> > +#define JH7110_AONRST_GMAC0_AHB			1
> > +#define JH7110_AONRST_AON_IOMUX			2
> > +#define JH7110_AONRST_PMU_APB			3
> > +#define JH7110_AONRST_PMU_WKUP			4
> > +#define JH7110_AONRST_RTC_APB			5
> > +#define JH7110_AONRST_RTC_CAL			6
> > +#define JH7110_AONRST_RTC_32K			7
> > +
> > +#define	JH7110_AONRST_END			8
> 
> Ditto

Will fix it. Thanks.

Best regards,
Hal

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