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Message-ID: <20221123135253.dcuxxuyqvqtdwz5b@pengutronix.de>
Date:   Wed, 23 Nov 2022 14:52:53 +0100
From:   Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
To:     Fabrice Gasnier <fabrice.gasnier@...s.st.com>
Cc:     thierry.reding@...il.com, alexandre.torgue@...s.st.com,
        linux-pwm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        olivier.moysan@...s.st.com
Subject: Re: [PATCH] pwm: stm32-lp: fix the check on arr and cmp registers
 update

On Wed, Nov 23, 2022 at 02:36:52PM +0100, Fabrice Gasnier wrote:
> The ARR (auto reload register) and CMP (compare) registers are
> successively written. The status bits to check the update of these
> registers are polled together with regmap_read_poll_timeout().
> The condition to end the loop may become true, even if one of the
> register isn't correctly updated.
> So ensure both status bits are set before clearing them.
> 
> Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver")
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@...s.st.com>

Looks reasonable

Acked-by: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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