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Message-Id: <167509347310.581147.17334972892537481751.b4-ty@gmail.com>
Date: Mon, 30 Jan 2023 16:45:04 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Fabrice Gasnier <fabrice.gasnier@...s.st.com>,
u.kleine-koenig@...gutronix.de
Cc: linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
olivier.moysan@...s.st.com, linux-pwm@...r.kernel.org,
alexandre.torgue@...s.st.com
Subject: Re: [PATCH] pwm: stm32-lp: fix the check on arr and cmp registers update
On Wed, 23 Nov 2022 14:36:52 +0100, Fabrice Gasnier wrote:
> The ARR (auto reload register) and CMP (compare) registers are
> successively written. The status bits to check the update of these
> registers are polled together with regmap_read_poll_timeout().
> The condition to end the loop may become true, even if one of the
> register isn't correctly updated.
> So ensure both status bits are set before clearing them.
>
> [...]
Applied, thanks!
[1/1] pwm: stm32-lp: fix the check on arr and cmp registers update
commit: 3066bc2d58be31275afb51a589668f265e419c37
Best regards,
--
Thierry Reding <thierry.reding@...il.com>
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