linux-kernel - Re: [PATCH v2 2/3] PCI: armada8k: Add AC5 SoC support

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Date:   Thu, 24 Nov 2022 15:58:17 +0100
From:   Thomas Petazzoni <thomas.petazzoni@...tlin.com>
To:     Vadym Kochan <vadym.kochan@...ision.eu>
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Elad Nachman <enachman@...vell.com>,
        Raz Adashi <raza@...vell.com>, Yuval Shaia <yshaia@...vell.com>
Subject: Re: [PATCH v2 2/3] PCI: armada8k: Add AC5 SoC support

Hello,

On Thu, 24 Nov 2022 15:58:27 +0200
Vadym Kochan <vadym.kochan@...ision.eu> wrote:


> -static int armada8k_pcie_start_link(struct dw_pcie *pci)
> -{
> -	u32 reg;
> -
> -	/* Start LTSSM */
> -	reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG);
> -	reg |= PCIE_APP_LTSSM_EN;
> -	dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg);
> -
> -	return 0;
> -}

So this code is going away, but I don't see it being re-added anywhere.
I don't think anything in the code you are adding that sets the
LTSSM_EN bit in PCIE_GLOBAL_CONTROL_REG. Am I missing something?

Thomas
-- 
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com