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Message-ID: <BN9PR11MB527650A018BE7BF422BDA2F58C0F9@BN9PR11MB5276.namprd11.prod.outlook.com>
Date: Thu, 24 Nov 2022 03:17:02 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: Thomas Gleixner <tglx@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>
CC: "x86@...nel.org" <x86@...nel.org>, Joerg Roedel <joro@...tes.org>,
"Will Deacon" <will@...nel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@....com>,
Marc Zyngier <maz@...nel.org>,
"Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
Jason Gunthorpe <jgg@...lanox.com>,
"Jiang, Dave" <dave.jiang@...el.com>,
Alex Williamson <alex.williamson@...hat.com>,
"Williams, Dan J" <dan.j.williams@...el.com>,
Logan Gunthorpe <logang@...tatee.com>,
"Raj, Ashok" <ashok.raj@...el.com>, Jon Mason <jdmason@...zu.us>,
Allen Hubbe <allenbh@...il.com>
Subject: RE: [patch V2 31/33] iommu/vt-d: Enable PCI/IMS
> From: Thomas Gleixner <tglx@...utronix.de>
> Sent: Monday, November 21, 2022 10:38 PM
>
> PCI/IMS works like PCI/MSI-X in the remapping. Just add the feature flag.
>
> Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> ---
> drivers/iommu/intel/irq_remapping.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> --- a/drivers/iommu/intel/irq_remapping.c
> +++ b/drivers/iommu/intel/irq_remapping.c
> @@ -1429,7 +1429,9 @@ static const struct irq_domain_ops intel
> };
>
> static const struct msi_parent_ops dmar_msi_parent_ops = {
> - .supported_flags = X86_VECTOR_MSI_FLAGS_SUPPORTED |
> MSI_FLAG_MULTI_PCI_MSI,
> + .supported_flags = X86_VECTOR_MSI_FLAGS_SUPPORTED |
> + MSI_FLAG_MULTI_PCI_MSI |
> + MSI_FLAG_PCI_IMS,
> .prefix = "IR-",
> .init_dev_msi_info = msi_parent_init_dev_msi_info,
> };
vIR is already available on vIOMMU today [1].
Fortunately both intel/amd IOMMU has a way to detect whether it's a vIOMMU.
For intel it's cap_caching_mode().
For AMD it's amd_iommu_np_cache.
Then MSI_FLAG_PCI_IMS should be set only on physical IOMMU.
In the future once we have hypercall then it can be set on vIOMMU too.
[1] https://lore.kernel.org/all/BL1PR11MB5271326D39DAB692F07587768C739@BL1PR11MB5271.namprd11.prod.outlook.com/
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