lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 24 Nov 2022 00:26:12 -0800
From:   Deepak Gupta <debug@...osinc.com>
To:     Guo Ren <guoren@...nel.org>
Cc:     palmer@...belt.com, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, paul.walmsley@...ive.com,
        Jisheng Zhang <jszhang@...nel.org>
Subject: Re: [PATCH] riscv: VMAP_STACK overflow detection thread-safe

On Thu, Nov 24, 2022 at 09:32:19AM +0800, Guo Ren wrote:
>> +.macro asm_per_cpu dst sym tmp
>> +       REG_L \tmp, TASK_TI_CPU_NUM(tp)
>> +       slli \tmp, \tmp, 0x3
>> +       la \dst, __per_cpu_offset
>> +       add \dst, \dst, \tmp
>> +       REG_L \tmp, 0(\dst)
>> +       la \dst, \sym
>> +       add \dst, \dst, \tmp
>Another tricky asm code of using percpu, I don't know how the percpu
>maintenance guy thinks.

On this, if you can point me to someone, I would like to get their feedback.
While discussing this, one issue that comes in my mind is if the shift of 0x3 
is correct or not on 32bit systems. I don't know what's the size of each entry
in `__per_cpu_offset`. On 64bit it's 8 bytes and thus 3 bit shift.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ