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Message-ID: <Y383FE6/w2sLd4I5@vermeer>
Date: Thu, 24 Nov 2022 10:19:16 +0100
From: Samuel Ortiz <sameo@...osinc.com>
To: "Hongren (Zenithal) Zheng" <i@...ithal.me>
Cc: Palmer Dabbelt <palmer@...osinc.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Atish Patra <atishp@...osinc.com>,
Anup Patel <anup@...infault.org>,
Eric Biederman <ebiederm@...ssion.com>,
Kees Cook <keescook@...omium.org>, linux-mm@...ck.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-api@...r.kernel.org,
Michael Kerrisk <mtk.manpages@...il.com>,
linux-man@...r.kernel.org, Jiatai He <jiatai2021@...as.ac.cn>,
Heiko Stuebner <heiko@...ech.de>, Conor.Dooley@...rochip.com
Subject: Re: [PATCH v3 1/3] RISC-V: add Bitmanip/Scalar Crypto parsing from DT
Hi,
On Mon, Jun 13, 2022 at 02:46:01AM +0800, Hongren (Zenithal) Zheng wrote:
> This patch parses Zb/Zk related string from DT and
> output them in cpuinfo
>
> One thing worth noting is that if DT provides zk,
> all zbkb, zbkc, zbkx and zkn, zkr, zkt would be enabled.
>
> Note that zk is a valid extension name and the current
> DT binding spec allows this.
>
> This patch also changes the logical id of
> existing multi-letter extensions and adds a statement
> that instead of logical id compatibility, the order
> is needed.
>
> There currently lacks a mechanism to merge them when
> producing cpuinfo. Namely if you provide a riscv,isa
> "rv64imafdc_zk_zks", the cpuinfo output would be
> "rv64imafdc_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed
> _zksh_zkt"
>
> Tested-by: Jiatai He <jiatai2021@...as.ac.cn>
> Signed-off-by: Hongren (Zenithal) Zheng <i@...ithal.me>
FWIW, after some rebasing:
Tested-by: Samuel Ortiz <sameo@...osinc.com>
Cheers,
Samuel.
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