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Message-ID: <Y385rS/5zDaDJ3Os@vermeer> Date: Thu, 24 Nov 2022 10:30:21 +0100 From: Samuel Ortiz <sameo@...osinc.com> To: "Hongren (Zenithal) Zheng" <i@...ithal.me> Cc: Palmer Dabbelt <palmer@...osinc.com>, Paul Walmsley <paul.walmsley@...ive.com>, Albert Ou <aou@...s.berkeley.edu>, Atish Patra <atishp@...osinc.com>, Anup Patel <anup@...infault.org>, Eric Biederman <ebiederm@...ssion.com>, Kees Cook <keescook@...omium.org>, linux-mm@...ck.org, linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, linux-api@...r.kernel.org, Michael Kerrisk <mtk.manpages@...il.com>, linux-man@...r.kernel.org, Jiatai He <jiatai2021@...as.ac.cn>, Heiko Stuebner <heiko@...ech.de>, Conor.Dooley@...rochip.com Subject: Re: [PATCH v3 2/3] RISC-V: uapi: add HWCAP for Bitmanip/Scalar Crypto On Mon, Jun 13, 2022 at 02:46:35AM +0800, Hongren (Zenithal) Zheng wrote: > diff --git a/arch/riscv/include/uapi/asm/hwcap.h b/arch/riscv/include/uapi/asm/hwcap.h > index 46dc3f5ee99f..bfed3e5c338c 100644 > --- a/arch/riscv/include/uapi/asm/hwcap.h > +++ b/arch/riscv/include/uapi/asm/hwcap.h > @@ -22,4 +22,26 @@ > #define COMPAT_HWCAP_ISA_D (1 << ('D' - 'A')) > #define COMPAT_HWCAP_ISA_C (1 << ('C' - 'A')) > > +/* > + * HWCAP2 flags - for elf_hwcap2 (in kernel) and AT_HWCAP2 > + * > + * As only 32 bits of elf_hwcap (in kernel) could be used > + * and RISC-V has reserved 26 bits of it, other caps like > + * bitmanip and crypto can not be placed in AT_HWCAP > + */ Have we agreed that multi-letter ISA extensions would use hwcap to be exposed to userspace? With so many potential extensions, we could quickly run out of space on AT_HWCAP2 as well. Cheers, Samuel.
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