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Message-ID: <CAJF2gTRZg6uPXKQMdx6f1cj-SojwTkJ1X7X7y-HeGP2yy9taxA@mail.gmail.com> Date: Sat, 26 Nov 2022 08:25:24 +0800 From: Guo Ren <guoren@...nel.org> To: Samuel Holland <samuel@...lland.org> Cc: Chen-Yu Tsai <wens@...e.org>, Jernej Skrabec <jernej.skrabec@...il.com>, linux-sunxi@...ts.linux.dev, Palmer Dabbelt <palmer@...belt.com>, Conor Dooley <conor@...nel.org>, linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Rob Herring <robh+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>, Jisheng Zhang <jszhang@...nel.org>, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Andre Przywara <andre.przywara@....com>, Albert Ou <aou@...s.berkeley.edu>, Anup Patel <apatel@...tanamicro.com>, Atish Patra <atishp@...osinc.com>, Christian Hewitt <christianshewitt@...il.com>, Conor Dooley <conor.dooley@...rochip.com>, Heinrich Schuchardt <heinrich.schuchardt@...onical.com>, Linus Walleij <linus.walleij@...aro.org>, Paul Walmsley <paul.walmsley@...ive.com>, Stanislav Jakubek <stano.jakubek@...il.com> Subject: Re: [PATCH v2 09/12] riscv: dts: allwinner: Add Dongshan Nezha STU devicetree Reviewed-by: Guo Ren <guoren@...nel.org> On Sat, Nov 26, 2022 at 7:47 AM Samuel Holland <samuel@...lland.org> wrote: > > The 100ask Dongshan Nezha STU is a system-on-module that can be used > standalone or with a carrier board. The SoM provides gigabit Ethernet, > HDMI, a USB peripheral port, and WiFi/Bluetooth via an RTL8723DS chip. > > The "DIY" carrier board exposes almost every pin from the D1 SoC to 0.1" > headers, but contains no digital circuitry, so it does not have its own > devicetree. > > Signed-off-by: Samuel Holland <samuel@...lland.org> > --- > > (no changes since v1) > > arch/riscv/boot/dts/allwinner/Makefile | 1 + > .../sun20i-d1-dongshan-nezha-stu.dts | 118 ++++++++++++++++++ > 2 files changed, 119 insertions(+) > create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts > > diff --git a/arch/riscv/boot/dts/allwinner/Makefile b/arch/riscv/boot/dts/allwinner/Makefile > index 2ed586fafaea..87f70b1af6b4 100644 > --- a/arch/riscv/boot/dts/allwinner/Makefile > +++ b/arch/riscv/boot/dts/allwinner/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-dongshan-nezha-stu.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts > new file mode 100644 > index 000000000000..c549a1c5fbf0 > --- /dev/null > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts > @@ -0,0 +1,118 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +// Copyright (C) 2022 Samuel Holland <samuel@...lland.org> > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/leds/common.h> > + > +/dts-v1/; > + > +#include "sun20i-d1.dtsi" > +#include "sun20i-common-regulators.dtsi" > + > +/ { > + model = "Dongshan Nezha STU"; > + compatible = "100ask,dongshan-nezha-stu", "allwinner,sun20i-d1"; > + > + aliases { > + ethernet0 = &emac; > + mmc0 = &mmc0; > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led-0 { > + color = <LED_COLOR_ID_GREEN>; > + function = LED_FUNCTION_STATUS; > + gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */ > + }; > + }; > + > + reg_usbvbus: usbvbus { > + compatible = "regulator-fixed"; > + regulator-name = "usbvbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ > + enable-active-high; > + vin-supply = <®_vcc>; > + }; > + > + /* > + * This regulator is PWM-controlled, but the PWM controller is not > + * yet supported, so fix the regulator to its default voltage. > + */ > + reg_vdd_cpu: vdd-cpu { > + compatible = "regulator-fixed"; > + regulator-name = "vdd-cpu"; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + vin-supply = <®_vcc>; > + }; > +}; > + > +&cpu0 { > + cpu-supply = <®_vdd_cpu>; > +}; > + > +&dcxo { > + clock-frequency = <24000000>; > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&emac { > + pinctrl-0 = <&rgmii_pe_pins>; > + pinctrl-names = "default"; > + phy-handle = <&ext_rgmii_phy>; > + phy-mode = "rgmii-id"; > + phy-supply = <®_vcc_3v3>; > + status = "okay"; > +}; > + > +&mdio { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > +&mmc0 { > + broken-cd; > + bus-width = <4>; > + disable-wp; > + vmmc-supply = <®_vcc_3v3>; > + vqmmc-supply = <®_vcc_3v3>; > + pinctrl-0 = <&mmc0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > + > +&uart0 { > + pinctrl-0 = <&uart0_pb8_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&usb_otg { > + dr_mode = "otg"; > + status = "okay"; > +}; > + > +&usbphy { > + usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */ > + usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ > + usb0_vbus-supply = <®_usbvbus>; > + status = "okay"; > +}; > -- > 2.37.4 > -- Best Regards Guo Ren
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