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Date:   Sat, 26 Nov 2022 10:24:32 +0800
From:   "yiyang (D)" <yiyang13@...wei.com>
To:     Christophe JAILLET <christophe.jaillet@...adoo.fr>
CC:     <gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
        <jonathanh@...dia.com>, <kyarlagadda@...dia.com>,
        <ldewangan@...dia.com>, <linux-kernel@...r.kernel.org>,
        <linux-serial@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
        <thierry.reding@...il.com>
Subject: Re: [PATCH] serial: tegra: Add missing clk_disable_unprepare() in
 tegra_uart_hw_init()



On 2022/11/25 19:19, Christophe JAILLET wrote:
> Le 25/11/2022 à 11:11, Yi Yang a écrit :
>> Add the missing clk_disable_unprepare() before return from
>> tegra_uart_hw_init() in the error handling path.
>>
>> Fixes: cc9ca4d95846 ("serial: tegra: Only print FIFO error message 
>> when an error occurs")
>> Fixes: d781ec21bae6 ("serial: tegra: report clk rate errors")
>> Signed-off-by: Yi Yang <yiyang13-hv44wF8Li93QT0dZR+AlfA@...lic.gmane.org>
>> ---
>>   drivers/tty/serial/serial-tegra.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
> 
> Hi,
> 
> I think that it is also missing in tegra_uart_startup() if an error 
> occurs after a successful tegra_uart_hw_init() call.
> 
> Or maybe (based on function mane) tegra_uart_hw_deinit() should called 
> there.
> 
> Just my 2c.
> 
> CJ
> 

Thanks! I will fix it in v2 patch.

> 
>> diff --git a/drivers/tty/serial/serial-tegra.c 
>> b/drivers/tty/serial/serial-tegra.c
>> index e5b9773db5e3..abc5039eb273 100644
>> --- a/drivers/tty/serial/serial-tegra.c
>> +++ b/drivers/tty/serial/serial-tegra.c
>> @@ -1046,6 +1046,7 @@ static int tegra_uart_hw_init(struct 
>> tegra_uart_port *tup)
>>       if (tup->cdata->fifo_mode_enable_status) {
>>           ret = tegra_uart_wait_fifo_mode_enabled(tup);
>>           if (ret < 0) {
>> +            clk_disable_unprepare(tup->uart_clk);
>>               dev_err(tup->uport.dev,
>>                   "Failed to enable FIFO mode: %d\n", ret);
>>               return ret;
>> @@ -1067,6 +1068,7 @@ static int tegra_uart_hw_init(struct 
>> tegra_uart_port *tup)
>>        */
>>       ret = tegra_set_baudrate(tup, TEGRA_UART_DEFAULT_BAUD);
>>       if (ret < 0) {
>> +        clk_disable_unprepare(tup->uart_clk);
>>           dev_err(tup->uport.dev, "Failed to set baud rate\n");
>>           return ret;
>>       }
> 
> .

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