linux-kernel - Re: [PATCH 6/6] arm64: dts: allwinner: h6: add Rongpin RP-H6C SoM and RP-H6B board

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Message-ID: <d52273d7-0c0c-7a4b-95d2-ffc4b70f2cbe@linaro.org>
Date:   Mon, 28 Nov 2022 09:50:49 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Icenowy Zheng <uwu@...nowy.me>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Samuel Holland <samuel@...lland.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Matthias Kaehlcke <mka@...omium.org>,
        Andre Przywara <andre.przywara@....com>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
        linux-usb@...r.kernel.org
Subject: Re: [PATCH 6/6] arm64: dts: allwinner: h6: add Rongpin RP-H6C SoM and
 RP-H6B board

On 27/11/2022 08:31, Icenowy Zheng wrote:
> Rongpin RP-H6C is an Allwinner H6 SoM by Rongpin, with Allwinner H6 SoC,
> AXP805 PMIC, LPDDR3 memory and eMMC storage on it.
> 
> RP-H6B is their official evaluation board of RP-H6C, with an onboard
> GL850G USB hub, Ampak AP6212 Wi-Fi module and some circuits about LVDS
> display. It also exports the OTG USB port, the USB 3.0 port, PCIe bus
> (as mPCIe slot), internal Ethernet PHY, analog audio/video and HDMI
> port.
> 
> Add a DTSI file for the SoM and a DTS for the full board.
> 
> Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
> ---
>  arch/arm64/boot/dts/allwinner/Makefile        |   1 +
>  .../boot/dts/allwinner/sun50i-h6-rp-h6b.dts   | 239 ++++++++++++++++++
>  .../boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi  | 180 +++++++++++++
>  3 files changed, 420 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
>  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
> 
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 6a96494a2e0a..e289fedcac29 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -36,6 +36,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-rp-h6b.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
>  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
> new file mode 100644
> index 000000000000..9fa40c365e63
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6b.dts
> @@ -0,0 +1,239 @@
> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> +/*
> + * Copyright (C) 2022 Icenowy Zheng <icenowy@...c.io>
> + */
> +/dts-v1/;
> +
> +#include "sun50i-h6-rp-h6c.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> +	model = "Rongpin RP-H6B baseboard";
> +	compatible = "rongpin,rp-h6b", "rongpin,rp-h6c",
> +		     "allwinner,sun50i-h6";
> +
> +	aliases {
> +		ethernet0 = &emac;
> +		serial0 = &uart0;
> +		/*
> +		 * Prioritize the external RTC because it's powered
> +		 * by a cell battery.
> +		 */
> +		rtc0 = &hym8563;
> +		rtc1 = &rtc;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	hdmi_connector: connector {
> +		compatible = "hdmi-connector";
> +		type = "a";
> +
> +		port {
> +			hdmi_con_in: endpoint {
> +				remote-endpoint = <&hdmi_out_con>;
> +			};
> +		};
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		led {
> +			label = "rongpin:red:link";
> +			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
> +			/*
> +			 * On the schematics this LED is marked as "lit when
> +			 * powering on and blinking when running".
> +			 */
> +			linux,default-trigger = "heartbeat";
> +		};
> +	};
> +
> +	/*
> +	 * The VDD_5V power rail is connected to the internal regulator
> +	 * of GL850G, to power up the 3.3V core of it.
> +	 */
> +	reg_v33_hub: v33-hub {

Node names should be generic, so at least generic "regulator" prefix or
suffix.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation

The same in further places.

> +		compatible = "regulator-fixed";
> +		regulator-name = "v33-hub";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&reg_vdd_5v>;
> +	};
> +
> +	/*
> +	 * This board inputs 5V to AP6212 via a SS34 diode. Use this
> +	 * regulator as the model of the internal regulator of AP6212.
> +	 */
> +	reg_vcc3v3_ap6212: vcc3v3-ap6212 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vcc3v3-ap6212";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		vin-supply = <&reg_ps>;
> +	};
> +
> +	reg_vdd_5v: vdd-5v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd-5v";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		startup-delay-us = <100000>;
> +		gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		vin-supply = <&reg_ps>;
> +	};
> +
> +	/* For mPCIe slot WWAN modules / PCIe cards */
> +	reg_vdd_3g: vdd-3g {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd-3g";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		startup-delay-us = <100000>;
> +		gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		vin-supply = <&reg_ps>;
> +		/*
> +		 * As a hack for lacking of control of a hub downstream
> +		 * port's Vbus.
> +		 */
> +		regulator-always-on;
> +	};
> +
> +	wifi_pwrseq: wifi_pwrseq {

No underscores in node names.

> +		compatible = "mmc-pwrseq-simple";
> +		reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
> +		post-power-on-delay-ms = <200>;
> +	};
> +};
> +
> +&de {
> +	status = "okay";
> +};
> +
> +&ehci0 {
> +	status = "okay";
> +};
> +
> +&ehci3 {
> +	status = "okay";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	hub@1 {
> +		/* Genesys Logic GL850G usb hub */
> +		compatible = "usb5e3,608";
> +		reg = <1>;
> +		vdd-supply = <&reg_v33_hub>;
> +		reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
> +	};
> +};
> +
> +&hdmi {
> +	status = "okay";
> +};
> +
> +&hdmi_out {
> +	hdmi_out_con: endpoint {
> +		remote-endpoint = <&hdmi_con_in>;
> +	};
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +
> +	hym8563: rtc@51 {
> +		compatible = "haoyu,hym8563";
> +		reg = <0x51>;
> +		#clock-cells = <0>;
> +	};
> +};
> +
> +&mmc0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc0_pins>;
> +	vmmc-supply = <&reg_cldo1>;
> +	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
> +	bus-width = <4>;
> +	status = "okay";
> +};
> +
> +&mmc1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc1_pins>;
> +	vmmc-supply = <&reg_vcc3v3_ap6212>;
> +	vqmmc-supply = <&reg_bldo3>;
> +	mmc-pwrseq = <&wifi_pwrseq>;
> +	non-removable;
> +	bus-width = <4>;
> +	status = "okay";
> +
> +	brcmf: wifi@1 {
> +		reg = <1>;
> +		compatible = "brcm,bcm4329-fmac";
> +		interrupt-parent = <&r_pio>;
> +		interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
> +		interrupt-names = "host-wake";
> +	};
> +};
> +
> +&ohci0 {
> +	status = "okay";
> +};
> +
> +/* Converted from 12v with a fixed DC-DC on the baseboard */
> +&reg_ps {
> +	regulator-min-microvolt = <5000000>;
> +	regulator-max-microvolt = <5000000>;
> +};
> +
> +&uart0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart0_ph_pins>;
> +	status = "okay";
> +};
> +
> +/* Bluetooth */
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
> +	uart-has-rtscts;
> +	status = "okay";
> +
> +	bluetooth {
> +		compatible = "brcm,bcm43438-bt";
> +		max-speed = <1500000>;
> +		clocks = <&rtc CLK_OSC32K_FANOUT>;
> +		clock-names = "lpo";
> +		vbat-supply = <&reg_ps>;
> +		vddio-supply = <&reg_bldo3>;
> +		device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
> +		shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
> +		interrupt-parent = <&r_pio>;
> +		interrupts = <1 1 IRQ_TYPE_EDGE_FALLING>; /* PM1 */
> +		interrupt-names = "host-wakeup";
> +	};
> +};
> +
> +&uart1_pins {
> +	bias-pull-up;
> +};
> +
> +&uart1_rts_cts_pins {
> +	bias-pull-up;
> +};
> +
> +&usb2otg {
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&usb2phy {
> +	usb0_vbus-supply = <&reg_vdd_5v>;
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
> new file mode 100644
> index 000000000000..53822718e2d7
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-rp-h6c.dtsi
> @@ -0,0 +1,180 @@
> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> +/*
> + * Copyright (C) 2019-2022 Icenowy Zheng <icenowy@...c.io>
> + */
> +
> +#include "sun50i-h6.dtsi"
> +#include "sun50i-h6-cpu-opp.dtsi"
> +#include "sun50i-h6-gpu-opp.dtsi"
> +
> +/ {
> +	ext_osc32k: ext_osc32k_clk {

No underscores in node names.

> +		#clock-cells = <0>;
> +		compatible = "fixed-clock";
> +		clock-frequency = <32768>;
> +		clock-output-names = "ext_osc32k";
> +	};
> +
> +	/* Marked 3.4v~5.5v on SoM schematics */
> +	reg_ps: ps {

regulator prefix/suffix/etc

> +		compatible = "regulator-fixed";
> +		regulator-name = "ps";
> +	};
> +};
> +

Best regards,
Krzysztof