linux-kernel - Re: [PATCH v4 0/3] Improve CLOCK_EVT_FEAT

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 29 Nov 2022 10:43:50 -0800 (PST)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     apatel@...tanamicro.com
CC:     robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        Paul Walmsley <paul.walmsley@...ive.com>,
        daniel.lezcano@...aro.org, tglx@...utronix.de,
        ajones@...tanamicro.com, atishp@...shpatra.org,
        samuel@...lland.org, Conor Dooley <conor.dooley@...rochip.com>,
        anup@...infault.org, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        apatel@...tanamicro.com
Subject:     Re: [PATCH v4 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting

On Tue, 29 Nov 2022 06:03:10 PST (-0800), apatel@...tanamicro.com wrote:
> This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP
> feature based on RISC-V platform capabilities.
>
> These patches can also be found in riscv_timer_dt_imp_v4 branch at:
> https://github.com/avpatel/linux.git
>
> Changes since v3:
>  - Rebased on Linux-6.1-rc7
>  - Replaced PATCH1 with a patch to initialize broadcast timer
>
> Changes since v2:
>  - Include Conor's revert patch as the first patch and rebased other patches
>  - Update PATCH2 to document bindings for separate RISC-V timer DT node
>  - Update PATCH3 based on RISC-V timer DT node bindings
>
> Changes since v1:
>  - Rebased on Linux-5.19-rc8
>  - Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu"
>
> Anup Patel (2):
>   dt-bindings: timer: Add bindings for the RISC-V timer device
>   clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT
>
> Conor Dooley (1):
>   RISC-V: time: initialize broadcast hrtimer based clock event device
>
>  .../bindings/timer/riscv,timer.yaml           | 52 +++++++++++++++++++
>  arch/riscv/kernel/time.c                      |  3 ++
>  drivers/clocksource/timer-riscv.c             | 12 ++++-
>  3 files changed, 66 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml

Acked-by: Palmer Dabbelt <palmer@...osinc.com>

IIRC the main issue here were the DT bindings, though, so I think we'll 
need to make sure that's sorted out.