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Message-ID: <89b16ec5-f9a5-f836-f51a-8325448e4775@linaro.org>
Date: Tue, 29 Nov 2022 10:24:34 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Aurelien Jarno <aurelien@...el32.net>,
Olivia Mackall <olivia@...enic.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Philipp Zabel <p.zabel@...gutronix.de>,
Lin Jinhan <troy.lin@...k-chips.com>
Cc: "open list:HARDWARE RANDOM NUMBER GENERATOR CORE"
<linux-crypto@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/Rockchip SoC support"
<linux-arm-kernel@...ts.infradead.org>,
"open list:ARM/Rockchip SoC support"
<linux-rockchip@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/3] dt-bindings: RNG: Add Rockchip RNG bindings
On 28/11/2022 19:47, Aurelien Jarno wrote:
> Add the RNG bindings for the RK3568 SoC from Rockchip
Use subject prefixes matching the subsystem (git log --oneline -- ...),
so it is rng, not RNG. Also, you are not adding all-Rockhip RNG but a
specific device.
Subject: drop second, redundant "bindings".
>
> Signed-off-by: Aurelien Jarno <aurelien@...el32.net>
> ---
> .../bindings/rng/rockchip,rk3568-rng.yaml | 60 +++++++++++++++++++
> 1 file changed, 60 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml
>
> diff --git a/Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml b/Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml
> new file mode 100644
> index 000000000000..c2f5ef69cf07
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml
> @@ -0,0 +1,60 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rng/rockchip,rk3568-rng.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip TRNG
> +
> +description: True Random Number Generator for some Rockchip SoCs
s/for some Rockchip SoCs/on Rokchip RK3568 SoC/
> +
> +maintainers:
> + - Aurelien Jarno <aurelien@...el32.net>
> +
> +properties:
> + compatible:
> + enum:
> + - rockchip,rk3568-rng
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: TRNG clock
> + - description: TRNG AHB clock
> +
> + clock-names:
> + items:
> + - const: trng_clk
> + - const: trng_hclk
These are too vague names. Everything is a clk in clock-names, so no
need usually to add it as name suffix. Give them some descriptive names,
e.g. core and ahb.
> +
> + resets:
> + maxItems: 1
> +
Best regards,
Krzysztof
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