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Date:   Wed, 30 Nov 2022 17:08:57 +0800
From:   Chuanhong Guo <gch981213@...il.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Xiangsheng Hou (侯祥胜) 
        <Xiangsheng.Hou@...iatek.com>,
        "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "vigneshr@...com" <vigneshr@...com>,
        "richard@....at" <richard@....at>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Benliang Zhao (赵本亮) 
        <Benliang.Zhao@...iatek.com>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Bin Zhang (章斌) <bin.zhang@...iatek.com>
Subject: Re: [PATCH 7/9] dt-bindings: spi: mtk-snfi: add two timing delay property

Hi!

On Wed, Nov 30, 2022 at 4:35 PM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
> >>> Will change to other private property. The read sample delay with
> >>> MediaTek SPI NAND controller can be set with values from 0 to 47.
> >>> However, it`s difficult to say the unit of each vaule, because the
> >>> unit
> >>> value will be difference with different chip process or different
> >>> corner IC.
> >>
> >> Why you cannot use same formula as other SPI drivers for sample-
> >> delay?
> >> And divide/multiple by some factor specific to SoC, which is taken
> >> from
> >> driver_data?
> >
> > Even for specific SoC, the unit of sample delay may be various with
> > different corner IC.
>
> Which is easy to achieve with driver_data as I said.

I think Xiangsheng means this:
This sample delay isn't achieved using a fixed clock signal. It's
probably some kind of delay circuit whose delay value varies
due to its manufacturing process. Every single chip made got
different delay units, so it's impossible to specify a single unit
for one chip model.

If that's true, shouldn't this be a value calibrated on-the-fly
on probe instead? A single device-tree is supposed to be
applied to all devices of the same model, so a value that
varies on a device-by-device basis probably shouldn't
be a device-tree property.

-- 
Regards,
Chuanhong Guo

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