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Message-ID: <04CBEBD4-3EDC-4FA0-BB11-DDD6B710C60C@kernel.org>
Date: Mon, 05 Dec 2022 00:10:34 +0000
From: Conor Dooley <conor@...nel.org>
To: Anup Patel <apatel@...tanamicro.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>
CC: Andrew Jones <ajones@...tanamicro.com>,
Atish Patra <atishp@...shpatra.org>,
Samuel Holland <samuel@...lland.org>,
Conor Dooley <conor.dooley@...rochip.com>,
Anup Patel <anup@...infault.org>, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Palmer Dabbelt <palmer@...osinc.com>
Subject: Re: [PATCH v5 1/3] RISC-V: time: initialize hrtimer based broadcast clock event device
On 1 December 2022 12:39:52 GMT, Anup Patel <apatel@...tanamicro.com> wrote:
>From: Conor Dooley <conor.dooley@...rochip.com>
>
>Similarly to commit 022eb8ae8b5e ("ARM: 8938/1: kernel: initialize
>broadcast hrtimer based clock event device"), RISC-V needs to initiate
>hrtimer based broadcast clock event device before C3STOP can be used.
>Otherwise, the introduction of C3STOP for the RISC-V arch timer in
>commit 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped
>during CPU suspend") leaves us without any broadcast timer registered.
>This prevents the kernel from entering oneshot mode, which breaks timer
>behaviour, for example clock_nanosleep().
>
>A test app that sleeps each cpu for 6, 5, 4, 3 ms respectively, HZ=250
>& C3STOP enabled, the sleep times are rounded up to the next jiffy:
>== CPU: 1 == == CPU: 2 == == CPU: 3 == == CPU: 4 ==
>Mean: 7.974992 Mean: 7.976534 Mean: 7.962591 Mean: 3.952179
>Std Dev: 0.154374 Std Dev: 0.156082 Std Dev: 0.171018 Std Dev: 0.076193
>Hi: 9.472000 Hi: 10.495000 Hi: 8.864000 Hi: 4.736000
>Lo: 6.087000 Lo: 6.380000 Lo: 4.872000 Lo: 3.403000
>Samples: 521 Samples: 521 Samples: 521 Samples: 521
>
>Link: https://lore.kernel.org/linux-riscv/YzYTNQRxLr7Q9JR0@spud/
>Fixes: 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend")
>Suggested-by: Samuel Holland <samuel@...lland.org>
>Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
>Reviewed-by: Samuel Holland <samuel@...lland.org>
>Acked-by: Palmer Dabbelt <palmer@...osinc.com>
Huh, thought I replied already but I just have forgotten to...
Since you've added this patch to your series, it needs your SoB appended.
Thanks,
Conor.
>---
> arch/riscv/kernel/time.c | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c
>index 8217b0f67c6c..1cf21db4fcc7 100644
>--- a/arch/riscv/kernel/time.c
>+++ b/arch/riscv/kernel/time.c
>@@ -5,6 +5,7 @@
> */
>
> #include <linux/of_clk.h>
>+#include <linux/clockchips.h>
> #include <linux/clocksource.h>
> #include <linux/delay.h>
> #include <asm/sbi.h>
>@@ -29,6 +30,8 @@ void __init time_init(void)
>
> of_clk_init(NULL);
> timer_probe();
>+
>+ tick_setup_hrtimer_broadcast();
> }
>
> void clocksource_arch_init(struct clocksource *cs)
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