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Message-Id: <20221205122048.16023-1-likexu@tencent.com>
Date: Mon, 5 Dec 2022 20:20:48 +0800
From: Like Xu <like.xu.linux@...il.com>
To: Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH] KVM: x86/pmu: Drop event_type and rename "struct kvm_event_hw_type_mapping"
From: Like Xu <likexu@...cent.com>
After commit ("02791a5c362b KVM: x86/pmu: Use PERF_TYPE_RAW
to merge reprogram_{gp,fixed}counter()"), vPMU starts to directly
use the hardware event eventsel and unit_mask to reprogram perf_event,
and the event_type field in the "struct kvm_event_hw_type_mapping"
is simply no longer being used.
After discarding this field, the name of the structure also lost
its mapping semantics, renaming it "struct kvm_pmu_hw_event" and
reorganizing the comments to continue to help newcomers.
Signed-off-by: Like Xu <likexu@...cent.com>
---
arch/x86/kvm/pmu.h | 3 +--
arch/x86/kvm/vmx/pmu_intel.c | 34 +++++++++++++++++++++++++---------
2 files changed, 26 insertions(+), 11 deletions(-)
diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
index 85ff3c0588ba..2aef09eafb70 100644
--- a/arch/x86/kvm/pmu.h
+++ b/arch/x86/kvm/pmu.h
@@ -18,10 +18,9 @@
#define VMWARE_BACKDOOR_PMC_REAL_TIME 0x10001
#define VMWARE_BACKDOOR_PMC_APPARENT_TIME 0x10002
-struct kvm_event_hw_type_mapping {
+struct kvm_pmu_hw_event {
u8 eventsel;
u8 unit_mask;
- unsigned event_type;
};
struct kvm_pmu_ops {
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 28b0a784f6e9..d34e9f85bdce 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -20,16 +20,32 @@
#define MSR_PMC_FULL_WIDTH_BIT (MSR_IA32_PMC0 - MSR_IA32_PERFCTR0)
-static struct kvm_event_hw_type_mapping intel_arch_events[] = {
- [0] = { 0x3c, 0x00, PERF_COUNT_HW_CPU_CYCLES },
- [1] = { 0xc0, 0x00, PERF_COUNT_HW_INSTRUCTIONS },
- [2] = { 0x3c, 0x01, PERF_COUNT_HW_BUS_CYCLES },
- [3] = { 0x2e, 0x4f, PERF_COUNT_HW_CACHE_REFERENCES },
- [4] = { 0x2e, 0x41, PERF_COUNT_HW_CACHE_MISSES },
- [5] = { 0xc4, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS },
- [6] = { 0xc5, 0x00, PERF_COUNT_HW_BRANCH_MISSES },
+/*
+ * The first part of hw_events in the following array represent Intel's
+ * Pre-defined Architectural Performance Events in an ordered manner:
+ *
+ * 0 - PERF_COUNT_HW_CPU_CYCLES
+ * 1 - PERF_COUNT_HW_INSTRUCTIONS
+ * 2 - PERF_COUNT_HW_BUS_CYCLES
+ * 3 - PERF_COUNT_HW_CACHE_REFERENCES
+ * 4 - PERF_COUNT_HW_CACHE_MISSES
+ * 5 - PERF_COUNT_HW_BRANCH_INSTRUCTIONS
+ * 6 - PERF_COUNT_HW_BRANCH_MISSES
+ *
+ * the second part of hw_events is defined by the generic kernel perf:
+ *
+ * 7 - PERF_COUNT_HW_REF_CPU_CYCLES
+ */
+static struct kvm_pmu_hw_event intel_arch_events[] = {
+ [0] = { 0x3c, 0x00 },
+ [1] = { 0xc0, 0x00 },
+ [2] = { 0x3c, 0x01 },
+ [3] = { 0x2e, 0x4f },
+ [4] = { 0x2e, 0x41 },
+ [5] = { 0xc4, 0x00 },
+ [6] = { 0xc5, 0x00 },
/* The above index must match CPUID 0x0A.EBX bit vector */
- [7] = { 0x00, 0x03, PERF_COUNT_HW_REF_CPU_CYCLES },
+ [7] = { 0x00, 0x03 },
};
/* mapping between fixed pmc index and intel_arch_events array */
--
2.38.1
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