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Message-ID: <20221205122124.3sixqn52i4xsdxbt@box.shutemov.name>
Date:   Mon, 5 Dec 2022 15:21:24 +0300
From:   "Kirill A. Shutemov" <kirill@...temov.name>
To:     Juergen Gross <jgross@...e.com>
Cc:     linux-kernel@...r.kernel.org, x86@...nel.org,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "H. Peter Anvin" <hpa@...or.com>,
        Andy Lutomirski <luto@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH v5 13/16] x86: decouple PAT and MTRR handling

On Mon, Dec 05, 2022 at 08:40:06AM +0100, Juergen Gross wrote:
> > That's a question for the Intel architects, I guess.
> > 
> > I'd just ask them how to setup PAT in TDX guests. Either they need to
> > change the recommended setup sequence, or the PAT support bit needs to
> > be cleared IMO.
> 
> I've forwarded the question to Intel, BTW.

I've initiated the talk internally too.

> Another question to you: where does the initial PAT MSR value come from?
> I guess from UEFI?

It is set by TDX module on initialization. See section 21.2.4.1.2. "TD
VMCS Guest MSRs" of TDX module spec[1]

[1] https://cdrdv2.intel.com/v1/dl/getContent/733568

-- 
  Kiryl Shutsemau / Kirill A. Shutemov

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