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Message-ID: <53393726-5a8a-1a13-c620-32c65872278c@amd.com>
Date: Mon, 5 Dec 2022 11:32:01 -0600
From: Kim Phillips <kim.phillips@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: x86@...nel.org, Babu Moger <Babu.Moger@....com>,
Borislav Petkov <bp@...e.de>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
Joao Martins <joao.m.martins@...cle.com>,
Jonathan Corbet <corbet@....net>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>,
David Woodhouse <dwmw@...zon.co.uk>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Juergen Gross <jgross@...e.com>,
Peter Zijlstra <peterz@...radead.org>,
Tony Luck <tony.luck@...el.com>,
Tom Lendacky <thomas.lendacky@....com>,
Alexey Kardashevskiy <aik@....com>, kvm@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/7] x86/cpu: Define a scattered No Nested Data
Breakpoints feature bit
On 12/5/22 4:23 AM, Borislav Petkov wrote:
> On Wed, Nov 30, 2022 at 07:49:57PM -0600, Kim Phillips wrote:
>> +++ b/arch/x86/include/asm/cpufeatures.h
>> @@ -307,6 +307,7 @@
>> #define X86_FEATURE_SGX_EDECCSSA (11*32+18) /* "" SGX EDECCSSA user leaf function */
>> #define X86_FEATURE_CALL_DEPTH (11*32+19) /* "" Call depth tracking for RSB stuffing */
>> #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */
>> +#define X86_FEATURE_NO_NESTED_DATA_BP (11*32+21) /* "" AMD No Nested Data Breakpoints */
>
> Right, what is the use of this bit in a KVM guest? Running perf tool in
> a guest would use that bit how?
This is starting to get off-topic. Propagating that bit to
the guest was originally added by:
commit 58b3d12c0a860cda34ed9d2378078ea5134e6812
Author: Paolo Bonzini <pbonzini@...hat.com>
Date: Thu Oct 28 13:26:38 2021 -0400
KVM: x86: add support for CPUID leaf 0x80000021
In the future, it will be used by:
https://lore.kernel.org/lkml/20221201021948.9259-1-aik@amd.com/
to allow hardware swapping of debug registers.
If it can't be used in the nested VM case, I can remove the
guest propagation code for it from PATCH 4/7 with a Fixes: for
the above commit, but this 1/7 PATCH will remain.
Thanks,
Kim
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