linux-kernel - Re: [PATCH 1/2] serial: Adapt Arm semihosting earlycon driver to RISC-V

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Message-ID: <b3aff238-c473-e587-dd04-cc5ef4517722@kernel.org>
Date:   Tue, 6 Dec 2022 07:35:03 +0100
From:   Jiri Slaby <jirislaby@...nel.org>
To:     Bin Meng <bmeng@...ylab.org>, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-serial@...r.kernel.org
Cc:     Albert Ou <aou@...s.berkeley.edu>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>
Subject: Re: [PATCH 1/2] serial: Adapt Arm semihosting earlycon driver to
 RISC-V

On 05. 12. 22, 6:00, Bin Meng wrote:
...
> --- a/drivers/tty/serial/earlycon-arm-semihost.c
> +++ b/drivers/tty/serial/earlycon-arm-semihost.c
...
> @@ -23,7 +27,18 @@
>    */
>   static void smh_putc(struct uart_port *port, unsigned char c)
>   {
> -#ifdef CONFIG_ARM64
> +#if defined(CONFIG_RISCV)
> +	asm volatile("addi    a1, %0, 0\n"
> +		     "addi    a0, zero, 3\n"
> +		     ".balign 16\n"
> +		     ".option push\n"
> +		     ".option norvc\n"
> +		     "slli    zero, zero, 0x1f\n"
> +		     "ebreak\n"
> +		     "srai    zero, zero, 0x7\n"
> +		     ".option pop\n"
> +		     : : "r" (&c) : "a0", "a1", "memory");
> +#elif defined(CONFIG_ARM64)
>   	asm volatile("mov  x1, %0\n"
>   		     "mov  x0, #3\n"
>   		     "hlt  0xf000\n"

Hmm, can we implement all those smh_putc() variants in respective 
arch/*/include/semihost.h instead?

thanks,
-- 
js
suse labs