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Message-ID: <149100d0dc205a317ed352cdfb391f2147a2afab.camel@mediatek.com>
Date:   Tue, 6 Dec 2022 09:04:39 +0000
From:   Xiangsheng Hou (侯祥胜) 
        <Xiangsheng.Hou@...iatek.com>
To:     "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "gch981213@...il.com" <gch981213@...il.com>,
        "vigneshr@...com" <vigneshr@...com>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        "richard@....at" <richard@....at>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Benliang Zhao (赵本亮) 
        <Benliang.Zhao@...iatek.com>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Bin Zhang (章斌) <bin.zhang@...iatek.com>
Subject: Re: [PATCH v2 4/9] mtd: nand: ecc-mtk: Add ECC support fot MT7986 IC

Hi Angelo,

On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote:
> Il 05/12/22 07:57, Xiangsheng Hou ha scritto:
> > Add ECC support fot MT7986 IC.
> > 
> > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@...iatek.com>
> > ---
> >   drivers/mtd/nand/ecc-mtk.c | 18 ++++++++++++++++++
> >   1 file changed, 18 insertions(+)
> > 
> > diff --git a/drivers/mtd/nand/ecc-mtk.c b/drivers/mtd/nand/ecc-
> > mtk.c
> > index 9f9b201fe706..c2f6cfa76a04 100644
> > --- a/drivers/mtd/nand/ecc-mtk.c
> > +++ b/drivers/mtd/nand/ecc-mtk.c
> > @@ -79,6 +79,10 @@ static const u8 ecc_strength_mt7622[] = {
> >   	4, 6, 8, 10, 12
> >   };
> >   
> > +static const u8 ecc_strength_mt7986[] = {
> > +	4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
> > +};
> > +
> >   enum mtk_ecc_regs {
> >   	ECC_ENCPAR00,
> >   	ECC_ENCIRQ_EN,
> > @@ -483,6 +487,17 @@ static const struct mtk_ecc_caps
> > mtk_ecc_caps_mt7622 = {
> >   	.pg_irq_sel = 0,
> >   };
> >   
> > +static const struct mtk_ecc_caps mtk_ecc_caps_mt7986 = {
> > +	.err_mask = 0x1f,
> 
> Can't we use GENMASK() to define err_mask instead?
> 
> #define MT7986_ERRNUM	GENMASK(4, 0)
> 
> P.S.: Did I get that right? Is that referred to the ERRNUM(x) bits

Yes, you are right.
I will change like
#define ECC_ERRMASK(x) GENMASK(x, 0),
since other IC driver data will use 0x3f and 0x7f err_mask.


Thanks
Xiangsheng Hou

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