linux-kernel - linux-next: manual merge of the pinctrl tree with the arm-soc tree

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <20221206121336.474457bb@canb.auug.org.au>
Date:   Tue, 6 Dec 2022 12:13:36 +1100
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Olof Johansson <olof@...om.net>, Arnd Bergmann <arnd@...db.de>
Cc:     ARM <linux-arm-kernel@...ts.infradead.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Dmitry Torokhov <dmitry.torokhov@...il.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux Next Mailing List <linux-next@...r.kernel.org>
Subject: linux-next: manual merge of the pinctrl tree with the arm-soc tree

Hi all,

Today's linux-next merge of the pinctrl tree got a conflict in:

  drivers/soc/fsl/qe/gpio.c

between commits:

  84582f9ed090 ("soc: fsl: qe: Avoid using gpio_to_desc()")
  66310b5a0fc1 ("soc: fsl: qe: request pins non-exclusively")

from the arm-soc tree and commit:

  c9eb6e546a23 ("soc: fsl: qe: Switch to use fwnode instead of of_node")

from the pinctrl tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/soc/fsl/qe/gpio.c
index 1440922341d8,9abb45ab138b..000000000000
--- a/drivers/soc/fsl/qe/gpio.c
+++ b/drivers/soc/fsl/qe/gpio.c
@@@ -13,11 -13,14 +13,13 @@@
  #include <linux/err.h>
  #include <linux/io.h>
  #include <linux/of.h>
 -#include <linux/of_gpio.h>
 +#include <linux/of_gpio.h>	/* for of_mm_gpio_chip */
 +#include <linux/gpio/consumer.h>
  #include <linux/gpio/driver.h>
 -/* FIXME: needed for gpio_to_chip() get rid of this */
 -#include <linux/gpio.h>
  #include <linux/slab.h>
  #include <linux/export.h>
+ #include <linux/property.h>
+ 
  #include <soc/fsl/qe/qe.h>
  
  struct qe_gpio_chip {
@@@ -187,16 -181,8 +189,16 @@@ struct qe_pin *qe_pin_request(struct de
  		goto err0;
  	}
  
 +	qe_pin->controller = gpiochip_get_data(gc);
 +	/*
 +	 * FIXME: this gets the local offset on the gpio_chip so that the driver
 +	 * can manipulate pin control settings through its custom API. The real
 +	 * solution is to create a real pin control driver for this.
 +	 */
 +	qe_pin->num = gpio_num - gc->base;
 +
- 	if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) {
+ 	if (!fwnode_device_is_compatible(gc->fwnode, "fsl,mpc8323-qe-pario-bank")) {
 -		pr_debug("%s: tried to get a non-qe pin\n", __func__);
 +		dev_dbg(dev, "%s: tried to get a non-qe pin\n", __func__);
  		err = -EINVAL;
  		goto err0;
  	}

Content of type "application/pgp-signature" skipped