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Message-ID: <4db35ac3914e444b754f9075141fd69e07e7c858.camel@mediatek.com>
Date:   Wed, 7 Dec 2022 01:42:03 +0000
From:   Xiangsheng Hou (侯祥胜) 
        <Xiangsheng.Hou@...iatek.com>
To:     "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "gch981213@...il.com" <gch981213@...il.com>,
        "vigneshr@...com" <vigneshr@...com>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        "richard@....at" <richard@....at>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Benliang Zhao (赵本亮) 
        <Benliang.Zhao@...iatek.com>,
        "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Bin Zhang (章斌) <bin.zhang@...iatek.com>
Subject: Re: [PATCH v2 3/9] spi: mtk-snfi: Add optional nfi_hclk which needed
 for MT7986

Hi Angelo,

On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote:
> Il 05/12/22 07:57, Xiangsheng Hou ha scritto:
> > Add optional nfi_hclk which needed for MT7986.
> > 
> > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@...iatek.com>
> 
> Is there any operation for which you need NFI_HCLK enabled, but at
> the same time
> PAD_CLK and/or NFI_CLK can be disabled?

No, for the new IP design on MT7986, will need the
PAD_CLK/NFI_CLK/NFI_HCLK enabled at the same time.

> If NFI_HCLK and NFI_CLK must always be ON at the same time, adding
> this clock to
> spi-mtk-snfi.c is *not* an optimal way of doing things: you can, at
> this point,
> set NFI_HCLK as parent of NFI_CLK in the MT7986 clock driver instead,
> without
> making any addition to this driver at all.

For some IC, there may have only NFI_CLK/PAD_CLK, and have no NFI_HCLK,
this rely on IC design.

Thanks
Xiangsheng Hou

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