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Message-Id: <20221208111910.1.I39c387f1e3176fcf340039ec12d54047de9f8526@changeid>
Date: Thu, 8 Dec 2022 11:20:02 -0800
From: Douglas Anderson <dianders@...omium.org>
To: Bjorn Andersson <andersson@...nel.org>,
Dmitry Torokhov <dmitry.torokhov@...il.com>
Cc: mka@...omium.org, swboyd@...omium.org,
linux-arm-msm@...r.kernel.org, linux-input@...r.kernel.org,
Yunlong Jia <ecs.beijing2022@...il.com>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Douglas Anderson <dianders@...omium.org>,
Andy Gross <agross@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 1/5] arm64: dts: qcom: sc7180: Bump up trogdor ts_reset_l drive strength
On at least one board (pazquel360) the reset line for the touchscreen
was scoped and found to take almost 2 ms to fall when we drove it
low. This wasn't great because the Linux driver for the touchscreen
(the elants_i2c driver) thinks it can do a 500 us reset pulse. If we
bump the drive strength to 8 mA then the reset line went down in ~421
us.
NOTE: we could apply this fix just for pazquel360, but:
* Probably other trogdor devices have similar timings and it's just
that nobody has noticed it before.
* There are other trogdor boards using the same elan driver that tries
to do 500 us reset pulses.
* Bumping the drive strength to 8mA across the board won't hurt. This
isn't a high speed signal or anything.
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
index f1defb94d670..ff1c7aa6a722 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
@@ -1376,7 +1376,15 @@ ts_reset_l: ts-reset-l-state {
pins = "gpio8";
function = "gpio";
bias-disable;
- drive-strength = <2>;
+
+ /*
+ * The reset GPIO to the touchscreen takes almost 2ms to drop
+ * at the default drive strength. When we bump it up to 8mA it
+ * falls in under 500us. We want this to be fast since the Elan
+ * datasheet (and any drivers written based on it) talk about using
+ * a 500 us reset pulse.
+ */
+ drive-strength = <8>;
};
sdc1_on: sdc1-on-state {
--
2.39.0.rc1.256.g54fd8350bd-goog
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