lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <0443d5e9-b2ce-7e6b-c69b-708d67a5bf97@kernel.org>
Date:   Thu, 8 Dec 2022 07:08:33 +0100
From:   Jiri Slaby <jirislaby@...nel.org>
To:     Bin Meng <bmeng@...ylab.org>, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-serial@...r.kernel.org
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Russell King <linux@...linux.org.uk>,
        Will Deacon <will@...nel.org>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 1/3] serial: earlycon-arm-semihost: Move smh_putc()
 variants in respective arch's semihost.h

On 07. 12. 22, 14:53, Bin Meng wrote:
> Move smh_putc() variants in respective arch/*/include/asm/semihost.h,
> in preparation to add RISC-V support.
> 
> Signed-off-by: Bin Meng <bmeng@...ylab.org>
...
> --- /dev/null
> +++ b/arch/arm/include/asm/semihost.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2012 ARM Ltd.
> + * Author: Marc Zyngier <marc.zyngier@....com>
> + *
> + * Adapted for ARM and earlycon:
> + * Copyright (C) 2014 Linaro Ltd.
> + * Author: Rob Herring <robh@...nel.org>
> + */

Much better. There are three minor issues:
1) protection against multiple #include-s is missing here.

> +#ifdef CONFIG_THUMB2_KERNEL
> +#define SEMIHOST_SWI	"0xab"
> +#else
> +#define SEMIHOST_SWI	"0x123456"
> +#endif
> +
> +static inline void smh_putc(struct uart_port *port, unsigned char c)

2) port is unused in all implementations. So it should be dropped.
3) can you make "c" an explicit u8?

> +{
> +	asm volatile("mov  r1, %0\n"
> +		     "mov  r0, #3\n"
> +		     "svc  " SEMIHOST_SWI "\n"
> +		     : : "r" (&c) : "r0", "r1", "memory");
> +}

thanks,
-- 
js
suse labs

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ